component
SN74LV595AQPWRQ1
Public Made by Adomby adom
Texas Instruments Shifting Register, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74LV595AQPWRQ1
Texas Instruments · Shifting Register · TSSOP-16
SN74LV595AQPWRQ1 from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | QB | output | QB parallel three-state output of the storage register. |
| 2 | QC | output | QC parallel three-state output of the storage register. |
| 3 | QD | output | QD parallel three-state output of the storage register. |
| 4 | QE | output | QE parallel three-state output of the storage register. |
| 5 | QF | output | QF parallel three-state output of the storage register. |
| 6 | QG | output | QG parallel three-state output of the storage register. |
| 7 | QH | output | QH parallel three-state output of the storage register. |
| 8 | GND | power_in | Ground. |
| 9 | QH' | output | Serial output of the shift register for cascading, which is not placed in high impedance when OE is high. |
| 10 | SRCLR | input | Shift register direct overriding clear input. |
| 11 | SRCLK | input | Shift register clock input. |
| 12 | RCLK | input | Storage register clock input. |
| 13 | OE | input | Output enable input; when high, all outputs except QH' are in the high-impedance state. |
| 14 | SER | input | Serial data input to the shift register. |
| 15 | QA | output | QA parallel three-state output of the storage register. |
| 16 | VCC | power_in | Positive supply, operating range 2 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | 5.5 | V | 5 | ||
| Operating free-air temperature | TA | -40 | 125 | °C | SN74LV595AQPWRQ1 | 5 | |
| High-level output voltage | VOH | 2 | V | IOH = -2 mA, VCC = 2.3 V, -40°C to 125°C | 6 | ||
| High-level output voltage | VOH | 2.45 | V | IOH = -8 mA, VCC = 3 V, QA-QH, -40°C to 125°C | 6 | ||
| High-level output voltage | VOH | 3.7 | V | IOH = -16 mA, VCC = 4.5 V, QA-QH, -40°C to 125°C | 6 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 50 µA, VCC = 2 V to 5.5 V, -40°C to 125°C | 6 | ||
| Low-level output voltage | VOL | 0.45 | V | IOL = 2 mA, VCC = 2.3 V, -40°C to 125°C | 6 | ||
| Low-level output voltage | VOL | 0.5 | V | IOL = 8 mA, VCC = 3 V, QA-QH, -40°C to 125°C | 6 | ||
| Low-level output voltage | VOL | 0.65 | V | IOL = 16 mA, VCC = 4.5 V, QA-QH, -40°C to 125°C | 6 | ||
| Input leakage current | II | -1 | 1 | µA | VI = 5.5 V or GND, VCC = 0 to 5.5 V, -40°C to 125°C | 6 | |
| Off-state output current | IOZ | -10 | 10 | µA | QA-QH, VO = VCC or GND, VCC = 5.5 V, -40°C to 125°C | 6 | |
| Supply current | ICC | 40 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V, -40°C to 125°C | 6 | ||
| Power-off leakage current | Ioff | 10 | µA | VI or VO = 0 to 5.5 V, VCC = 0 V, -40°C to 125°C | 6 | ||
| Input capacitance | Ci | 3.5 | pF | VI = VCC or GND, VCC = 3.3 V, -40°C to 125°C | 6 | ||
| Supply voltage range | VCC | -0.5 | 7 | V | 4 | ||
| Input voltage range | VI | -0.5 | 7 | V | 4 | ||
| Output voltage, high-impedance or power-off state | VO | -0.5 | 4.6 | V | 4 | ||
| Output voltage, high or low state | VO | -0.5 | V | max VCC + 0.5 V | 4 | ||
| Input clamp current | IIK | -20 | mA | VI < 0 | 4 | ||
| Output clamp current | IOK | -50 | mA | VO < 0 | 4 | ||
| Continuous output current | IO | -35 | 35 | mA | 4 | ||
| Continuous current through VCC or GND | -70 | 70 | mA | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 138.7 | °C/W | PW (TSSOP) 16 pins | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 69.1 | °C/W | PW (TSSOP) 16 pins | 5 | ||
| Junction-to-board thermal resistance | RθJB | 81.8 | °C/W | PW (TSSOP) 16 pins | 5 | ||
| Junction-to-top characterization parameter | ΨJT | 20.3 | °C/W | PW (TSSOP) 16 pins | 5 | ||
| Junction-to-board characterization parameter | ΨJB | 81.3 | °C/W | PW (TSSOP) 16 pins | 5 | ||
| Maximum clock frequency | fmax | 30 | MHz | VCC = 2.5 V ± 0.2 V, CL = 50 pF, -40°C to 125°C | 7 | ||
| Maximum clock frequency | fmax | 40 | MHz | VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40°C to 125°C | 8 | ||
| Maximum clock frequency | fmax | 75 | MHz | VCC = 5 V ± 0.5 V, CL = 50 pF, -40°C to 125°C | 8 | ||
| Propagation delay RCLK to QA-QH | tPLH/tPHL | 1 | 22.3 | ns | VCC = 2.5 V ± 0.2 V, CL = 50 pF, -40°C to 125°C | 7 | |
| Propagation delay RCLK to QA-QH | tPLH/tPHL | 1 | 20 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40°C to 125°C | 8 | |
| Propagation delay RCLK to QA-QH | tPLH/tPHL | 1 | 13.5 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF, -40°C to 125°C | 8 | |
| Propagation delay SRCLK to QH' | tPLH/tPHL | 1 | 21.5 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40°C to 125°C | 8 | |
| Propagation delay SRCLR to QH' | tPHL | 1 | 20.2 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40°C to 125°C | 8 | |
| Enable time OE to QA-QH | tPZH | 1 | 20 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40°C to 125°C | 8 | |
| Disable time OE to QA-QH | tPHZ | 1 | 19.2 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40°C to 125°C | 8 | |
| Pulse duration SRCLK high or low | tw | 6.5 | ns | VCC = 3.3 V ± 0.3 V, TA = -40°C to 125°C | 7 | ||
| Setup time SER before SRCLK↑ | tsu | 4.5 | ns | VCC = 3.3 V ± 0.3 V, TA = -40°C to 125°C | 7 | ||
| Hold time SER after SRCLK↑ | th | 2.5 | ns | VCC = 3.3 V ± 0.3 V, TA = -40°C to 125°C | 7 | ||
| Power dissipation capacitance | Cpd | 111 | pF | CL = 50 pF, f = 10 MHz, VCC = 3.3 V, TA = 25°C | 10 |
CAD (KiCad official)
- Symbol:
SN74LV595AQPWRQ1 - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
sn74lv595aqpwrq1-etched.step/sn74lv595aqpwrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv595aqpwrq1.step/sn74lv595aqpwrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
c16cff5c9451e839, retrieved 2026-10-24, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74LV595AQPWRQ1
**Texas Instruments** · Shifting Register · TSSOP-16
SN74LV595AQPWRQ1 from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | QB | output | QB parallel three-state output of the storage register. |
| 2 | QC | output | QC parallel three-state output of the storage register. |
| 3 | QD | output | QD parallel three-state output of the storage register. |
| 4 | QE | output | QE parallel three-state output of the storage register. |
| 5 | QF | output | QF parallel three-state output of the storage register. |
| 6 | QG | output | QG parallel three-state output of the storage register. |
| 7 | QH | output | QH parallel three-state output of the storage register. |
| 8 | GND | power_in | Ground. |
| 9 | QH' | output | Serial output of the shift register for cascading, which is not placed in high impedance when OE is high. |
| 10 | SRCLR | input | Shift register direct overriding clear input. |
| 11 | SRCLK | input | Shift register clock input. |
| 12 | RCLK | input | Storage register clock input. |
| 13 | OE | input | Output enable input; when high, all outputs except QH' are in the high-impedance state. |
| 14 | SER | input | Serial data input to the shift register. |
| 15 | QA | output | QA parallel three-state output of the storage register. |
| 16 | VCC | power_in | Positive supply, operating range 2 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic ICs |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | | 5.5 | V | | 5 |
| Operating free-air temperature | TA | -40 | | 125 | °C | SN74LV595AQPWRQ1 | 5 |
| High-level output voltage | VOH | 2 | | | V | IOH = -2 mA, VCC = 2.3 V, -40°C to 125°C | 6 |
| High-level output voltage | VOH | 2.45 | | | V | IOH = -8 mA, VCC = 3 V, QA-QH, -40°C to 125°C | 6 |
| High-level output voltage | VOH | 3.7 | | | V | IOH = -16 mA, VCC = 4.5 V, QA-QH, -40°C to 125°C | 6 |
| Low-level output voltage | VOL | | | 0.1 | V | IOL = 50 µA, VCC = 2 V to 5.5 V, -40°C to 125°C | 6 |
| Low-level output voltage | VOL | | | 0.45 | V | IOL = 2 mA, VCC = 2.3 V, -40°C to 125°C | 6 |
| Low-level output voltage | VOL | | | 0.5 | V | IOL = 8 mA, VCC = 3 V, QA-QH, -40°C to 125°C | 6 |
| Low-level output voltage | VOL | | | 0.65 | V | IOL = 16 mA, VCC = 4.5 V, QA-QH, -40°C to 125°C | 6 |
| Input leakage current | II | -1 | | 1 | µA | VI = 5.5 V or GND, VCC = 0 to 5.5 V, -40°C to 125°C | 6 |
| Off-state output current | IOZ | -10 | | 10 | µA | QA-QH, VO = VCC or GND, VCC = 5.5 V, -40°C to 125°C | 6 |
| Supply current | ICC | | | 40 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V, -40°C to 125°C | 6 |
| Power-off leakage current | Ioff | | | 10 | µA | VI or VO = 0 to 5.5 V, VCC = 0 V, -40°C to 125°C | 6 |
| Input capacitance | Ci | | 3.5 | | pF | VI = VCC or GND, VCC = 3.3 V, -40°C to 125°C | 6 |
| Supply voltage range | VCC | -0.5 | | 7 | V | | 4 |
| Input voltage range | VI | -0.5 | | 7 | V | | 4 |
| Output voltage, high-impedance or power-off state | VO | -0.5 | | 4.6 | V | | 4 |
| Output voltage, high or low state | VO | -0.5 | | | V | max VCC + 0.5 V | 4 |
| Input clamp current | IIK | -20 | | | mA | VI < 0 | 4 |
| Output clamp current | IOK | -50 | | | mA | VO < 0 | 4 |
| Continuous output current | IO | -35 | | 35 | mA | | 4 |
| Continuous current through VCC or GND | | -70 | | 70 | mA | | 4 |
| Junction temperature | TJ | | | 150 | °C | | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| Junction-to-ambient thermal resistance | RθJA | | 138.7 | | °C/W | PW (TSSOP) 16 pins | 5 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 69.1 | | °C/W | PW (TSSOP) 16 pins | 5 |
| Junction-to-board thermal resistance | RθJB | | 81.8 | | °C/W | PW (TSSOP) 16 pins | 5 |
| Junction-to-top characterization parameter | ΨJT | | 20.3 | | °C/W | PW (TSSOP) 16 pins | 5 |
| Junction-to-board characterization parameter | ΨJB | | 81.3 | | °C/W | PW (TSSOP) 16 pins | 5 |
| Maximum clock frequency | fmax | 30 | | | MHz | VCC = 2.5 V ± 0.2 V, CL = 50 pF, -40°C to 125°C | 7 |
| Maximum clock frequency | fmax | 40 | | | MHz | VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40°C to 125°C | 8 |
| Maximum clock frequency | fmax | 75 | | | MHz | VCC = 5 V ± 0.5 V, CL = 50 pF, -40°C to 125°C | 8 |
| Propagation delay RCLK to QA-QH | tPLH/tPHL | 1 | | 22.3 | ns | VCC = 2.5 V ± 0.2 V, CL = 50 pF, -40°C to 125°C | 7 |
| Propagation delay RCLK to QA-QH | tPLH/tPHL | 1 | | 20 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40°C to 125°C | 8 |
| Propagation delay RCLK to QA-QH | tPLH/tPHL | 1 | | 13.5 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF, -40°C to 125°C | 8 |
| Propagation delay SRCLK to QH' | tPLH/tPHL | 1 | | 21.5 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40°C to 125°C | 8 |
| Propagation delay SRCLR to QH' | tPHL | 1 | | 20.2 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40°C to 125°C | 8 |
| Enable time OE to QA-QH | tPZH | 1 | | 20 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40°C to 125°C | 8 |
| Disable time OE to QA-QH | tPHZ | 1 | | 19.2 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40°C to 125°C | 8 |
| Pulse duration SRCLK high or low | tw | 6.5 | | | ns | VCC = 3.3 V ± 0.3 V, TA = -40°C to 125°C | 7 |
| Setup time SER before SRCLK↑ | tsu | 4.5 | | | ns | VCC = 3.3 V ± 0.3 V, TA = -40°C to 125°C | 7 |
| Hold time SER after SRCLK↑ | th | 2.5 | | | ns | VCC = 3.3 V ± 0.3 V, TA = -40°C to 125°C | 7 |
| Power dissipation capacitance | Cpd | | 111 | | pF | CL = 50 pF, f = 10 MHz, VCC = 3.3 V, TA = 25°C | 10 |
## CAD (KiCad official)
- Symbol: `SN74LV595AQPWRQ1`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `sn74lv595aqpwrq1-etched.step` / `sn74lv595aqpwrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lv595aqpwrq1.step` / `sn74lv595aqpwrq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74lv595a-q1) (32 pp, sha256 `c16cff5c9451e839`, retrieved 2026-10-24, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74lv595aqpwrq1-datasheet.pdf)