component
SN74LV4T125PWR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LV4T125PWR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-14
SN74LV4T125PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for buffer 1; low active, high sets output to high-impedance. |
| 2 | 1A | input | Logic input for buffer 1; 5.5 V overvoltage tolerant for level translation. |
| 3 | 1Y | tri_state | Three-state output for buffer 1; sources/sinks up to 16 mA at 5.0 V VCC. |
| 4 | 2OE | input | Output enable input for buffer 2; low active, high sets output to high-impedance. |
| 5 | 2A | input | Logic input for buffer 2; 5.5 V overvoltage tolerant for level translation. |
| 6 | 2Y | tri_state | Three-state output for buffer 2; sources/sinks up to 16 mA at 5.0 V VCC. |
| 7 | GND | power_in | Ground pin; establishes reference potential for all signal and power levels. |
| 8 | 3Y | tri_state | Three-state output for buffer 3; sources/sinks up to 16 mA at 5.0 V VCC. |
| 9 | 3A | input | Logic input for buffer 3; 5.5 V overvoltage tolerant for level translation. |
| 10 | 3OE | input | Output enable input for buffer 3; low active, high sets output to high-impedance. |
| 11 | 4Y | tri_state | Three-state output for buffer 4; sources/sinks up to 16 mA at 5.0 V VCC. |
| 12 | 4A | input | Logic input for buffer 4; 5.5 V overvoltage tolerant for level translation. |
| 13 | 4OE | input | Output enable input for buffer 4; low active, high sets output to high-impedance. |
| 14 | VCC | power_in | Power supply pin; accepts 1.6 V to 5.5 V for flexible level translation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74LV4T125PWR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74lv4t125pwr-etched.step/sn74lv4t125pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv4t125pwr.step/sn74lv4t125pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
ed11d02fa66b71b6, retrieved 2026-09-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).