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Initial commit: component/sn74lv4051atdrep

Ray ·dc5cfb99ba ·1d ago
2 files changed +300
README.mdadded+52
@@ -0,0 +1,52 @@+# SN74LV4051ATDREP++**Texas Instruments** · Analog Switches, Multiplexers · SOIC-16++SN74LV4051ATDREP from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Y4 | passive | Analog switch terminal for channel 4, selected when INH is low and C=H, B=L, A=L; each channel passes signals up to 5.5 V (peak) in either direction. |+| 2 | Y6 | passive | Analog switch terminal for channel 6, selected when INH is low and C=H, B=H, A=L; each channel passes signals up to 5.5 V (peak) in either direction. |+| 3 | COM | passive | Common analog switch terminal that connects to the selected channel when INH is low; switch I/O voltage is limited to −0.5 V to VCC + 0.5 V and switch through current to ±25 mA. |+| 4 | Y7 | passive | Analog switch terminal for channel 7, selected when INH is low and C=H, B=H, A=H; each channel passes signals up to 5.5 V (peak) in either direction. |+| 5 | Y5 | passive | Analog switch terminal for channel 5, selected when INH is low and C=H, B=L, A=H; each channel passes signals up to 5.5 V (peak) in either direction. |+| 6 | INH | input | Active-high inhibit control; when high, all switches are open and no channel is selected, with control inputs rated 0 V to 5.5 V. |+| 7 | GND | power_in | Ground reference pin for the device. |+| 8 | GND | power_in | Ground reference pin for the device (second GND pin, tied with pin 7 in the datasheet figure). |+| 9 | C | input | Most significant channel-select bit, used with B and A to choose one of the eight channels; control input rated 0 V to 5.5 V. |+| 10 | B | input | Middle channel-select bit, used with C and A to choose one of the eight channels; control input rated 0 V to 5.5 V. |+| 11 | A | input | Least significant channel-select bit, used with C and B to choose one of the eight channels; control input rated 0 V to 5.5 V. |+| 12 | Y3 | passive | Analog switch terminal for channel 3, selected when INH is low and C=L, B=H, A=H; each channel passes signals up to 5.5 V (peak) in either direction. |+| 13 | Y0 | passive | Analog switch terminal for channel 0, selected when INH is low and C=L, B=L, A=L; each channel passes signals up to 5.5 V (peak) in either direction. |+| 14 | Y1 | passive | Analog switch terminal for channel 1, selected when INH is low and C=L, B=L, A=H; each channel passes signals up to 5.5 V (peak) in either direction. |+| 15 | Y2 | passive | Analog switch terminal for channel 2, selected when INH is low and C=L, B=H, A=L; each channel passes signals up to 5.5 V (peak) in either direction. |+| 16 | VCC | power_in | Positive supply pin; the datasheet specifies VCC of 2 V to 5.5 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Interface |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `SN74LV4051ATDREP`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `sn74lv4051atdrep-etched.step` / `sn74lv4051atdrep-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lv4051atdrep.step` / `sn74lv4051atdrep.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74lv4051a-ep) (18 pp, sha256 `e0d1dea88834f97c`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74lv4051atdrep-datasheet.pdf)
page.jsonadded+248
@@ -0,0 +1,248 @@+{+  "slug": "sn74lv4051atdrep",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Analog Switches, Multiplexers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "interface",+    "sn74lv4051atdrep",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74lv4051atdrep.kicad_sym",+    "sn74lv4051atdrep.kicad_mod",+    "sn74lv4051atdrep.glb",+    "sn74lv4051atdrep.step",+    "sn74lv4051atdrep.lbr",+    "docs/hero.png",+    "docs/sn74lv4051atdrep-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "sn74lv4051atdrep-hero.glb",+    "sn74lv4051atdrep-hero.overlay.json"+  ],+  "component": {+    "mpn": "SN74LV4051ATDREP",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-16",+    "pin_count": 16,+    "category": "Interface",+    "subcategory": "Analog Switches, Multiplexers",+    "datasheet": "https://www.ti.com/cn/lit/gpn/sn74lv4051a-ep",+    "parts": {+      "symbol": "sn74lv4051atdrep.kicad_sym",+      "footprint": "sn74lv4051atdrep.kicad_mod",+      "model_3d": "sn74lv4051atdrep-hero.glb",+      "model_3d_plain": "sn74lv4051atdrep.glb",+      "model_3d_step": "sn74lv4051atdrep-etched.step",+      "model_3d_step_plain": "sn74lv4051atdrep.step",+      "lbr": "sn74lv4051atdrep.lbr"+    },+    "distributor_links": {+      "lcsc": "C2674022",+      "digikey": "296-22314-2-ND",+      "mouser": "595-SN74LV4051ATDREP"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T16:04:30Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-22314-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-SN74LV4051ATDREP",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "Y4",+        "type": "passive",+        "description": "Analog switch terminal for channel 4, selected when INH is low and C=H, B=L, A=L; each channel passes signals up to 5.5 V (peak) in either direction."+      },+      {+        "number": "2",+        "name": "Y6",+        "type": "passive",+        "description": "Analog switch terminal for channel 6, selected when INH is low and C=H, B=H, A=L; each channel passes signals up to 5.5 V (peak) in either direction."+      },+      {+        "number": "3",+        "name": "COM",+        "type": "passive",+        "description": "Common analog switch terminal that connects to the selected channel when INH is low; switch I/O voltage is limited to −0.5 V to VCC + 0.5 V and switch through current to ±25 mA."+      },+      {+        "number": "4",+        "name": "Y7",+        "type": "passive",+        "description": "Analog switch terminal for channel 7, selected when INH is low and C=H, B=H, A=H; each channel passes signals up to 5.5 V (peak) in either direction."+      },+      {+        "number": "5",+        "name": "Y5",+        "type": "passive",+        "description": "Analog switch terminal for channel 5, selected when INH is low and C=H, B=L, A=H; each channel passes signals up to 5.5 V (peak) in either direction."+      },+      {+        "number": "6",+        "name": "INH",+        "type": "input",+        "description": "Active-high inhibit control; when high, all switches are open and no channel is selected, with control inputs rated 0 V to 5.5 V."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference pin for the device."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference pin for the device (second GND pin, tied with pin 7 in the datasheet figure)."+      },+      {+        "number": "9",+        "name": "C",+        "type": "input",+        "description": "Most significant channel-select bit, used with B and A to choose one of the eight channels; control input rated 0 V to 5.5 V."+      },+      {+        "number": "10",+        "name": "B",+        "type": "input",+        "description": "Middle channel-select bit, used with C and A to choose one of the eight channels; control input rated 0 V to 5.5 V."+      },+      {+        "number": "11",+        "name": "A",+        "type": "input",+        "description": "Least significant channel-select bit, used with C and B to choose one of the eight channels; control input rated 0 V to 5.5 V."+      },+      {+        "number": "12",+        "name": "Y3",+        "type": "passive",+        "description": "Analog switch terminal for channel 3, selected when INH is low and C=L, B=H, A=H; each channel passes signals up to 5.5 V (peak) in either direction."+      },+      {+        "number": "13",+        "name": "Y0",+        "type": "passive",+        "description": "Analog switch terminal for channel 0, selected when INH is low and C=L, B=L, A=L; each channel passes signals up to 5.5 V (peak) in either direction."+      },+      {+        "number": "14",+        "name": "Y1",+        "type": "passive",+        "description": "Analog switch terminal for channel 1, selected when INH is low and C=L, B=L, A=H; each channel passes signals up to 5.5 V (peak) in either direction."+      },+      {+        "number": "15",+        "name": "Y2",+        "type": "passive",+        "description": "Analog switch terminal for channel 2, selected when INH is low and C=L, B=H, A=L; each channel passes signals up to 5.5 V (peak) in either direction."+      },+      {+        "number": "16",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply pin; the datasheet specifies VCC of 2 V to 5.5 V."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The page 1 pinout figure is text-extracted, so the pin numbers were assigned by extraction order (pi; Pins 7 and 8 are both labelled GND in the datasheet figure; the datasheet does not say whether they "+        ],+        "pages_sent": 18,+        "cost_usd": 0.0872,+        "at": "2026-10-08T16:04:11"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/sn74lv4051a-ep",+        "pages": 18,+        "sha256": "e0d1dea88834f97c",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "sn74lv4051atdrep.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          9.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "sn74lv4051atdrep-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          9.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "0cb7a514959f3033784d88d9e7912da11aa653673f4273243b66201d7025adc4",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file