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Contents

README

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SN74LV4051ATDREP

Texas Instruments · Analog Switches, Multiplexers · SOIC-16

SN74LV4051ATDREP from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Y4 passive Analog switch terminal for channel 4, selected when INH is low and C=H, B=L, A=L; each channel passes signals up to 5.5 V (peak) in either direction.
2 Y6 passive Analog switch terminal for channel 6, selected when INH is low and C=H, B=H, A=L; each channel passes signals up to 5.5 V (peak) in either direction.
3 COM passive Common analog switch terminal that connects to the selected channel when INH is low; switch I/O voltage is limited to −0.5 V to VCC + 0.5 V and switch through current to ±25 mA.
4 Y7 passive Analog switch terminal for channel 7, selected when INH is low and C=H, B=H, A=H; each channel passes signals up to 5.5 V (peak) in either direction.
5 Y5 passive Analog switch terminal for channel 5, selected when INH is low and C=H, B=L, A=H; each channel passes signals up to 5.5 V (peak) in either direction.
6 INH input Active-high inhibit control; when high, all switches are open and no channel is selected, with control inputs rated 0 V to 5.5 V.
7 GND power_in Ground reference pin for the device.
8 GND power_in Ground reference pin for the device (second GND pin, tied with pin 7 in the datasheet figure).
9 C input Most significant channel-select bit, used with B and A to choose one of the eight channels; control input rated 0 V to 5.5 V.
10 B input Middle channel-select bit, used with C and A to choose one of the eight channels; control input rated 0 V to 5.5 V.
11 A input Least significant channel-select bit, used with C and B to choose one of the eight channels; control input rated 0 V to 5.5 V.
12 Y3 passive Analog switch terminal for channel 3, selected when INH is low and C=L, B=H, A=H; each channel passes signals up to 5.5 V (peak) in either direction.
13 Y0 passive Analog switch terminal for channel 0, selected when INH is low and C=L, B=L, A=L; each channel passes signals up to 5.5 V (peak) in either direction.
14 Y1 passive Analog switch terminal for channel 1, selected when INH is low and C=L, B=L, A=H; each channel passes signals up to 5.5 V (peak) in either direction.
15 Y2 passive Analog switch terminal for channel 2, selected when INH is low and C=L, B=H, A=L; each channel passes signals up to 5.5 V (peak) in either direction.
16 VCC power_in Positive supply pin; the datasheet specifies VCC of 2 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Interface
Pins 16

CAD (KiCad official)

  • Symbol: SN74LV4051ATDREP
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: sn74lv4051atdrep-etched.step / sn74lv4051atdrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lv4051atdrep.step / sn74lv4051atdrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (18 pp, sha256 e0d1dea88834f97c, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF