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SN74LV4046APWR
Public Made by Adomby adom
Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74LV4046APWR
Texas Instruments · Clock Generators, PLLs, Frequency Synthesizers · TSSOP-16
SN74LV4046APWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PCPOUT | output | Phase comparator pulse output. |
| 2 | PC1OUT | output | Phase comparator 1 output. |
| 3 | COMPIN | input | Comparator input. |
| 4 | VCOOUT | output | VCO output. |
| 5 | INH | input | Inhibit input, which controls the VCO for ON/OFF keying and low standby power consumption. |
| 6 | C1A | passive | Capacitor C1 connection A. |
| 7 | C1B | passive | Capacitor C1 connection B. |
| 8 | GND | power_in | Ground (0 V). |
| 9 | VCOIN | input | VCO input. |
| 10 | DEMOUT | output | Demodulator output. |
| 11 | R1 | passive | Resistor R1 connection. |
| 12 | R2 | passive | Resistor R2 connection. |
| 13 | PC2OUT | output | Phase comparator 2 output. |
| 14 | SIGIN | input | Signal input. |
| 15 | PC3OUT | output | Phase comparator 3 output. |
| 16 | VCC | power_in | Positive supply voltage, specified over the 3 V to 5.5 V recommended operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Clock/Timing |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN74LV4046APWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
sn74lv4046apwr-etched.step/sn74lv4046apwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv4046apwr.step/sn74lv4046apwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
59629b0484cc44bb, retrieved 2026-10-11, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74LV4046APWR
**Texas Instruments** · Clock Generators, PLLs, Frequency Synthesizers · TSSOP-16
SN74LV4046APWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PCPOUT | output | Phase comparator pulse output. |
| 2 | PC1OUT | output | Phase comparator 1 output. |
| 3 | COMPIN | input | Comparator input. |
| 4 | VCOOUT | output | VCO output. |
| 5 | INH | input | Inhibit input, which controls the VCO for ON/OFF keying and low standby power consumption. |
| 6 | C1A | passive | Capacitor C1 connection A. |
| 7 | C1B | passive | Capacitor C1 connection B. |
| 8 | GND | power_in | Ground (0 V). |
| 9 | VCOIN | input | VCO input. |
| 10 | DEMOUT | output | Demodulator output. |
| 11 | R1 | passive | Resistor R1 connection. |
| 12 | R2 | passive | Resistor R2 connection. |
| 13 | PC2OUT | output | Phase comparator 2 output. |
| 14 | SIGIN | input | Signal input. |
| 15 | PC3OUT | output | Phase comparator 3 output. |
| 16 | VCC | power_in | Positive supply voltage, specified over the 3 V to 5.5 V recommended operating range. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Clock/Timing |
| Pins | 16 |
## CAD (KiCad official)
- Symbol: `SN74LV4046APWR`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `sn74lv4046apwr-etched.step` / `sn74lv4046apwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lv4046apwr.step` / `sn74lv4046apwr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74lv4046a.pdf) (29 pp, sha256 `59629b0484cc44bb`, retrieved 2026-10-11, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74lv4046apwr-datasheet.pdf)