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SN74LV374ADWR

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Texas Instruments Flip Flops, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LV374ADWR

Texas Instruments · Flip Flops · SOIC-20-300mil

SN74LV374ADWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-low buffered output-enable; when high, the eight outputs are placed in the high-impedance state, and OE does not affect internal latch operation.
2 1Q output Output 1 of the 3-state octal D-type flip-flop, which takes the logic level of 1D on the positive CLK edge and is designed to drive highly capacitive or relatively low-impedance loads.
3 1D input Data input 1, sampled on the positive transition of CLK; inputs are overvoltage tolerant up to 5.5 V at any valid VCC.
4 2D input Data input 2, sampled on the positive transition of CLK; inputs are overvoltage tolerant up to 5.5 V at any valid VCC.
5 2Q output Output 2 of the 3-state octal D-type flip-flop, which takes the logic level of 2D on the positive CLK edge and is designed to drive highly capacitive or relatively low-impedance loads.
6 3Q output Output 3 of the 3-state octal D-type flip-flop, which takes the logic level of 3D on the positive CLK edge and is designed to drive highly capacitive or relatively low-impedance loads.
7 3D input Data input 3, sampled on the positive transition of CLK; inputs are overvoltage tolerant up to 5.5 V at any valid VCC.
8 4D input Data input 4, sampled on the positive transition of CLK; inputs are overvoltage tolerant up to 5.5 V at any valid VCC.
9 4Q output Output 4 of the 3-state octal D-type flip-flop, which takes the logic level of 4D on the positive CLK edge and is designed to drive highly capacitive or relatively low-impedance loads.
10 GND power_in Ground pin for the device.
11 CLK input Clock input; the Q outputs are set to the logic levels present at the D inputs on its positive transition, and clock pulse width is specified in the timing requirements (5 ns minimum at VCC = 5 V ± 0.5 V).
12 5Q output Output 5 of the 3-state octal D-type flip-flop, which takes the logic level of 5D on the positive CLK edge and is designed to drive highly capacitive or relatively low-impedance loads.
13 5D input Data input 5, sampled on the positive transition of CLK; inputs are overvoltage tolerant up to 5.5 V at any valid VCC.
14 6D input Data input 6, sampled on the positive transition of CLK; inputs are overvoltage tolerant up to 5.5 V at any valid VCC.
15 6Q output Output 6 of the 3-state octal D-type flip-flop, which takes the logic level of 6D on the positive CLK edge and is designed to drive highly capacitive or relatively low-impedance loads.
16 7Q output Output 7 of the 3-state octal D-type flip-flop, which takes the logic level of 7D on the positive CLK edge and is designed to drive highly capacitive or relatively low-impedance loads.
17 7D input Data input 7, sampled on the positive transition of CLK; inputs are overvoltage tolerant up to 5.5 V at any valid VCC.
18 8D input Data input 8, sampled on the positive transition of CLK; inputs are overvoltage tolerant up to 5.5 V at any valid VCC.
19 8Q output Output 8 of the 3-state octal D-type flip-flop, which takes the logic level of 8D on the positive CLK edge and is designed to drive highly capacitive or relatively low-impedance loads.
20 VCC power_in Power supply pin; the recommended supply range is 2 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74LV374ADWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74lv374adwr-etched.step / sn74lv374adwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lv374adwr.step / sn74lv374adwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 d778bfdb66a574d4, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF