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SN74LV373APWR

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Texas Instruments Latches, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LV373APWR

Texas Instruments · Latches · TSSOP-20

SN74LV373APWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Output Enable input that controls the 3-state outputs.
2 1Q output 1Q latch output.
3 1D input 1D data input.
4 2D input 2D data input.
5 2Q output 2Q latch output.
6 3Q output 3Q latch output.
7 3D input 3D data input.
8 4D input 4D data input.
9 4Q output 4Q latch output.
10 GND power_in Ground pin.
11 LE input Latch Enable input.
12 5Q output 5Q latch output.
13 5D input 5D data input.
14 6D input 6D data input.
15 6Q output 6Q latch output.
16 7Q output 7Q latch output.
17 7D input 7D data input.
18 8D input 8D data input.
19 8Q output 8Q latch output.
20 VCC power_in Power supply pin, VCC operation of 2 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 4
Input voltage VI -0.5 7 V 4
Output voltage high-Z or power-off VO -0.5 7 V high-impedance or power-off state 4
Output voltage VO -0.5 5.5 V VCC + 0.5 V, limited to 5.5 V max 4
Input clamp current IIK -20 mA VI < 0 4
Output clamp current IOK -50 mA VO < 0 4
Continuous output current IO -35 35 mA VO = 0 to VCC 4
Continuous current through VCC or GND -70 70 mA 4
Storage temperature Tstg -65 150 °C 4
ESD HBM V(ESD) -3000 3000 V HBM, all pins 4
ESD CDM V(ESD) -2000 2000 V CDM, all pins 4
Supply voltage VCC 2 5.5 V 5
High-level input voltage VIH 1.5 V VCC = 2 V 5
Low-level input voltage VIL 0.5 V VCC = 2 V 5
Input voltage VI 0 5.5 V 5
Output voltage 3-state VO 0 5.5 V 3-state 5
High-level output current IOH -16 mA VCC = 4.5 V to 5.5 V 5
Low-level output current IOL 16 mA VCC = 4.5 V to 5.5 V 5
Input transition rise or fall Δt/Δv 20 ns/V VCC = 4.5 V to 5.5 V 5
Operating free-air temperature TA -40 125 °C 5
Junction-to-ambient thermal resistance RθJA 128.2 °C/W PW (TSSOP) 20 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 70.5 °C/W PW (TSSOP) 5
Junction-to-board thermal resistance RθJB 79.3 °C/W PW (TSSOP) 5
Junction-to-top characterization parameter ψJT 23.4 °C/W PW (TSSOP) 5
Junction-to-board characterization parameter ψJB 78.9 °C/W PW (TSSOP) 5
High-level output voltage VOH 3.8 V IOH = -16 mA, VCC = 4.5 V, -40°C to +125°C 6
High-level output voltage VOH 2.48 V IOH = −8 mA, VCC = 3 V, -40°C to +125°C 6
High-level output voltage VOH 2 V IOH = −2 mA, VCC = 2.3 V, -40°C to +125°C 6
Low-level output voltage VOL 0.55 V IOL = 16 mA, VCC = 4.5 V, -40°C to +125°C 6
Low-level output voltage VOL 0.44 V IOL = 8 mA, VCC = 3 V, -40°C to +125°C 6
Low-level output voltage VOL 0.4 V IOL = 2 mA, VCC = 2.3 V, -40°C to +125°C 6
Low-level output voltage VOL 0.1 V IOL = 50 µA, VCC = 2 V to 5.5 V, -40°C to +125°C 6
Input leakage current II -1 1 µA VI = 5.5 V or GND, VCC = 0 V to 5.5 V 6
Off-state output current IOZ -5 5 µA VI = VCC or GND, VCC = 5.5 V 6
Supply current ICC 20 µA VI = VCC or GND, IO = 0, VCC = 5.5 V 6
Power-off leakage current Ioff 5 µA VI or VO = 0 to VCC, VCC = 0 6
Input capacitance Ci 2.9 pF VI = VCC or GND, VCC = 3.3 V, TA = 25°C 6
Pulse duration, LE high tw 5 ns VCC = 3.3 V ± 0.3 V, -40°C to +125°C 6
Setup time, data before LE↓ tsu 4.5 ns VCC = 3.3 V ± 0.3 V, -40°C to +125°C 6
Hold time, data after LE↓ th 1.5 ns VCC = 3.3 V ± 0.3 V, -40°C to +125°C 6
Pulse duration, LE high tw 6.5 ns VCC = 2.5 V ± 0.2 V, -40°C to +125°C 6
Propagation delay D to Q tpd 1 11.5 ns VCC = 5 V ± 0.5 V, CL = 50 pF, -40°C to +125°C 7
Propagation delay D to Q tpd 1 18 ns VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40°C to +125°C 7
Propagation delay D to Q tpd 1 22.5 ns VCC = 2.5 V ± 0.2 V, CL = 50 pF, -40°C to +125°C 7
Output skew tsk(o) 1 ns VCC = 5 V ± 0.5 V, -40°C to +125°C 7
Power dissipation capacitance Cpd 19.5 pF Outputs enabled, CL = 50 pF, f = 10 MHz, VCC = 5 V, TA = 25°C 8

CAD (KiCad official)

  • Symbol: SN74LV373APWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74lv373apwr-etched.step / sn74lv373apwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lv373apwr.step / sn74lv373apwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 59e165660e76a607, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF