component
SN74LV367ADR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LV367ADR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-16
SN74LV367ADR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 OE | input | Active-low output enable for group 1; enables outputs 1Y1-1Y4 when low, high-impedance when high. |
| 2 | 1A1 | input | Data input for buffer 1.1; output 1Y1 follows this input when 1OE is low. |
| 3 | 1Y1 | tri_state | 3-state output for buffer 1.1; noninverted copy of 1A1 when 1OE is low, high-impedance when 1OE is high. |
| 4 | 1A2 | input | Data input for buffer 1.2; output 1Y2 follows this input when 1OE is low. |
| 5 | 1Y2 | tri_state | 3-state output for buffer 1.2; noninverted copy of 1A2 when 1OE is low, high-impedance when 1OE is high. |
| 6 | 1A3 | input | Data input for buffer 1.3; output 1Y3 follows this input when 1OE is low. |
| 7 | 1Y3 | tri_state | 3-state output for buffer 1.3; noninverted copy of 1A3 when 1OE is low, high-impedance when 1OE is high. |
| 8 | GND | power_in | Ground pin. |
| 9 | 1Y4 | tri_state | 3-state output for buffer 1.4; noninverted copy of 1A4 when 1OE is low, high-impedance when 1OE is high. |
| 10 | 1A4 | input | Data input for buffer 1.4; output 1Y4 follows this input when 1OE is low. |
| 11 | 2Y1 | tri_state | 3-state output for buffer 2.1; noninverted copy of 2A1 when 2OE is low, high-impedance when 2OE is high. |
| 12 | 2A1 | input | Data input for buffer 2.1; output 2Y1 follows this input when 2OE is low. |
| 13 | 2Y2 | tri_state | 3-state output for buffer 2.2; noninverted copy of 2A2 when 2OE is low, high-impedance when 2OE is high. |
| 14 | 2A2 | input | Data input for buffer 2.2; output 2Y2 follows this input when 2OE is low. |
| 15 | 2 OE | input | Active-low output enable for group 2; enables outputs 2Y1-2Y2 when low, high-impedance when high. |
| 16 | VCC | power_in | Supply voltage pin; operating range 2-5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN74LV367ADR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
sn74lv367adr-etched.step/sn74lv367adr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv367adr.step/sn74lv367adr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
b3ae46fddd62d6c7, retrieved 2026-09-26, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).