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Contents

README

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SN74LV27APWR

Texas Instruments · Logic ICs · TSSOP-14

SN74LV27APWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input 1A of NOR gate 1, forming Y = A + B + C in positive logic.
2 1B input Input 1B of NOR gate 1, forming Y = A + B + C in positive logic.
3 2A input Input 2A of NOR gate 2, forming Y = A + B + C in positive logic.
4 2B input Input 2B of NOR gate 2, forming Y = A + B + C in positive logic.
5 2C input Input 2C of NOR gate 2, forming Y = A + B + C in positive logic.
6 2Y output Output 2Y of NOR gate 2; low when any input is high.
7 GND power_in Ground pin for the device.
8 3Y output Output 3Y of NOR gate 3; low when any input is high.
9 3A input Input 3A of NOR gate 3, forming Y = A + B + C in positive logic.
10 3B input Input 3B of NOR gate 3, forming Y = A + B + C in positive logic.
11 3C input Input 3C of NOR gate 3, forming Y = A + B + C in positive logic.
12 1Y output Output 1Y of NOR gate 1; low when any input is high.
13 1C input Input 1C of NOR gate 1, forming Y = A + B + C in positive logic.
14 VCC power_in Power supply pin; the device operates from 2 V to 5.5 V VCC.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 7 V 4
Input voltage range VI -0.5 7 V 4
Output voltage range applied in power-off state VO -0.5 7 V power-off state 4
Input clamp current IIK -20 mA VI < 0 4
Output clamp current IOK -50 mA VO < 0 4
Continuous output current IO -25 25 mA VO = 0 to VCC 4
Continuous current through VCC or GND -50 50 mA 4
Storage temperature Tstg -65 150 °C 4
Supply voltage VCC 2 5.5 V 4
High level input voltage VIH 1.5 V VCC = 2 V 4
Low level input voltage VIL 0.5 V VCC = 2 V 4
High level output current IOH -50 µA VCC = 2 V 4
High level output current IOH -2 mA VCC = 2.3 V to 2.7 V 4
High level output current IOH -6 mA VCC = 3 V to 3.6 V 4
High level output current IOH -12 mA VCC = 4.5 V to 5.5 V 4
Low level output current IOL 50 µA VCC = 2 V 5
Low level output current IOL 2 mA VCC = 2.3 V to 2.7 V 5
Low level output current IOL 6 mA VCC = 3 V to 3.6 V 5
Low level output current IOL 12 mA VCC = 4.5 V to 5.5 V 5
Input transition rise and fall rate Δt/Δv 200 ns/V VCC = 2.3 V to 2.7 V 5
Input transition rise and fall rate Δt/Δv 100 ns/V VCC = 3 V to 3.6 V 5
Input transition rise and fall rate Δt/Δv 20 ns/V VCC = 4.5 V to 5.5 V 5
Operating free-air temperature TA -40 85 °C 5
Junction-to-ambient thermal resistance (PW package) RθJA 113 °C/W PW (TSSOP-14) package 4
High-level output voltage VOH 2 V IOH = -2 mA, VCC = 2.3 V 5
High-level output voltage VOH 2.48 V IOH = -6 mA, VCC = 3 V 5
High-level output voltage VOH 3.8 V IOH = -12 mA, VCC = 4.5 V 5
Low-level output voltage VOL 0.1 V IOL = 50 µA, VCC = 2 V to 5.5 V 5
Low-level output voltage VOL 0.4 V IOL = 2 mA, VCC = 2.3 V 5
Low-level output voltage VOL 0.44 V IOL = 6 mA, VCC = 3 V 5
Low-level output voltage VOL 0.55 V IOL = 12 mA, VCC = 4.5 V 5
Input leakage current II -1 1 µA VI = 5.5 V or GND, VCC = 0 to 5.5 V 5
Supply current ICC 20 µA VI = VCC or GND, IO = 0, VCC = 5.5 V 5
Off-state leakage current Ioff 5 µA VI or VO = 0 to 5.5 V, VCC = 0 V 5
Input capacitance Ci 1.9 pF VI = VCC or GND, VCC = 3.3 V 5
tpd A, B, or C to Y, TA = 25°C tpd 6.7 13.8 ns VCC = 2.5 V ± 0.2 V, CL = 15 pF 5
tpd A, B, or C to Y tpd 1 16 ns VCC = 2.5 V ± 0.2 V, CL = 15 pF, over recommended operating free-air temperature range 5
tpd A, B, or C to Y, TA = 25°C tpd 9.5 17.5 ns VCC = 2.5 V ± 0.2 V, CL = 50 pF 5
tpd A, B, or C to Y tpd 1 21 ns VCC = 2.5 V ± 0.2 V, CL = 50 pF, over recommended operating free-air temperature range 5
tpd A, B, or C to Y, TA = 25°C tpd 5 8.8 ns VCC = 3.3 V ± 0.3 V, CL = 15 pF 6
tpd A, B, or C to Y tpd 1 10.5 ns VCC = 3.3 V ± 0.3 V, CL = 15 pF, over recommended operating free-air temperature range 6
tpd A, B, or C to Y, TA = 25°C tpd 6.9 12.3 ns VCC = 3.3 V ± 0.3 V, CL = 50 pF 6
tpd A, B, or C to Y tpd 1 14 ns VCC = 3.3 V ± 0.3 V, CL = 50 pF, over recommended operating free-air temperature range 6
tpd A, B, or C to Y, TA = 25°C tpd 3.9 5.9 ns VCC = 5 V ± 0.5 V, CL = 15 pF 6
tpd A, B, or C to Y tpd 1 7 ns VCC = 5 V ± 0.5 V, CL = 15 pF, over recommended operating free-air temperature range 6
tpd A, B, or C to Y, TA = 25°C tpd 5.2 7.9 ns VCC = 5 V ± 0.5 V, CL = 50 pF 6
tpd A, B, or C to Y tpd 1 9 ns VCC = 5 V ± 0.5 V, CL = 50 pF, over recommended operating free-air temperature range 6
Quiet output, maximum dynamic VOL VOL(P) 0.2 0.8 V VCC = 3.3 V, CL = 50 pF, TA = 25°C 6
Quiet output, minimum dynamic VOL VOL(V) 0 -0.8 V VCC = 3.3 V, CL = 50 pF, TA = 25°C 6
Quiet output, minimum dynamic VOH VOH(V) 3.2 V VCC = 3.3 V, CL = 50 pF, TA = 25°C 6
High-level dynamic input voltage VIH(D) 2.31 V VCC = 3.3 V, CL = 50 pF, TA = 25°C 6
Low-level dynamic input voltage VIL(D) 0.99 V VCC = 3.3 V, CL = 50 pF, TA = 25°C 6

CAD (KiCad official)

  • Symbol: SN74LV27APWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74lv27apwr-etched.step / sn74lv27apwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lv27apwr.step / sn74lv27apwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 88c8057b3ba12aef, retrieved 2026-10-17, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF