component
SN74LV273ADBR
Public Made by Adomby adom
Texas Instruments Flip Flops, SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 8d ago |
| viewers | 8d ago |
| package.json | 8d ago |
| page.json | 8d ago |
| README.md | 8d ago |
| sn74lv273adbr-etched.glb | 8d ago |
| sn74lv273adbr-etched.step | 8d ago |
| sn74lv273adbr-hero.glb | 8d ago |
| sn74lv273adbr-hero.overlay.json | 8d ago |
| sn74lv273adbr.glb | 8d ago |
| sn74lv273adbr.kicad_mod | 8d ago |
| sn74lv273adbr.kicad_sym | 8d ago |
| sn74lv273adbr.lbr | 8d ago |
| sn74lv273adbr.step | 8d ago |
SN74LV273ADBR
Texas Instruments · Flip Flops · SSOP-20-208mil
SN74LV273ADBR from Texas Instruments, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLR | input | Clear pin (Table 5-1 lists it as an input; the datasheet gives no further detail on its active level). |
| 2 | 1Q | output | 1Q output. |
| 3 | 1D | input | 1D input. |
| 4 | 2D | input | 2D input. |
| 5 | 2Q | output | 2Q output. |
| 6 | 3Q | output | 3Q output. |
| 7 | 3D | input | 3D input. |
| 8 | 4D | input | 4D input. |
| 9 | 4Q | output | 4Q output. |
| 10 | GND | power_in | Ground pin. |
| 11 | CLK | input | Clock pin. |
| 12 | 5Q | output | 5Q output. |
| 13 | 5D | input | 5D input. |
| 14 | 6D | input | 6D input. |
| 15 | 6Q | output | 6Q output. |
| 16 | 7Q | output | 7Q output. |
| 17 | 7D | input | 7D input. |
| 18 | 8D | input | 8D input. |
| 19 | 8Q | output | 8Q output. |
| 20 | VCC | power_in | Power pin; the recommended VCC range is stated in the datasheet features as 2 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-20-208mil |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | 7 | V | 5 | ||
| Input voltage range | VI | -0.5 | 7 | V | 5 | ||
| Output voltage range, high-Z or power-off state | VO | -0.5 | 7 | V | high-impedance or power-off state | 5 | |
| Output voltage range | VO | -0.5 | V | max VCC + 0.5 V, limited to 5.5 V maximum | 5 | ||
| Input clamp current | IIK | -20 | mA | VI < 0 | 5 | ||
| Output clamp current | IOK | -50 | mA | VO < 0 | 5 | ||
| Continuous output current | IO | -25 | 25 | mA | VO = 0 to VCC | 5 | |
| Continuous current through VCC or GND | -50 | 50 | mA | 5 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 5 | ||
| Supply voltage | VCC | 2 | 5.5 | V | 6 | ||
| High-level input voltage | VIH | 1.5 | V | VCC = 2 V | 6 | ||
| Low-level input voltage | VIL | 0.5 | V | VCC = 2 V | 6 | ||
| Input voltage | VI | 0 | 5.5 | V | 6 | ||
| Output voltage | VO | 0 | V | max VCC | 6 | ||
| High-level output current | IOH | -50 | µA | VCC = 2 V | 6 | ||
| High-level output current | IOH | -2 | mA | VCC = 2.3 V to 2.7 V | 6 | ||
| High-level output current | IOH | -6 | mA | VCC = 3 V to 3.6 V | 6 | ||
| High-level output current | IOH | -12 | mA | VCC = 4.5 V to 5.5 V | 6 | ||
| Low-level output current | IOL | 50 | µA | VCC = 2 V | 6 | ||
| Low-level output current | IOL | 2 | mA | VCC = 2.3 V to 2.7 V | 6 | ||
| Low-level output current | IOL | 6 | mA | VCC = 3 V to 3.6 V | 6 | ||
| Low-level output current | IOL | 12 | mA | VCC = 4.5 V to 5.5 V | 6 | ||
| Input transition rise or fall rate | Δt/Δv | 200 | ns/V | VCC = 2.3 V to 2.7 V | 6 | ||
| Input transition rise or fall rate | Δt/Δv | 100 | ns/V | VCC = 3 V to 3.6 V | 6 | ||
| Input transition rise or fall rate | Δt/Δv | 20 | ns/V | VCC = 4.5 V to 5.5 V | 6 | ||
| Operating free-air temperature | TA | -40 | 125 | °C | 6 | ||
| High-level output voltage | VOH | 2 | V | IOH = -2 mA, VCC = 2.3 V, -40°C to 125°C | 7 | ||
| High-level output voltage | VOH | 2.48 | V | IOH = -6 mA, VCC = 3 V, -40°C to 125°C | 7 | ||
| High-level output voltage | VOH | 3.8 | V | IOH = -12 mA, VCC = 4.5 V, -40°C to 125°C | 7 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = -50 µA, VCC = 2 V to 5.5 V, -40°C to 125°C | 7 | ||
| Low-level output voltage | VOL | 0.4 | V | IOL = -2 mA, VCC = 2.3 V, -40°C to 125°C | 7 | ||
| Low-level output voltage | VOL | 0.44 | V | IOL = -6 mA, VCC = 3 V, -40°C to 125°C | 7 | ||
| Low-level output voltage | VOL | 0.55 | V | IOL = -12 mA, VCC = 4.5 V, -40°C to 125°C | 7 | ||
| Input leakage current | II | -1 | 1 | µA | VI = 5.5 V or GND, VCC = 0 to 5.5 V, -40°C to 125°C | 7 | |
| Supply current | ICC | 20 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V, -40°C to 125°C | 7 | ||
| Partial power-down output leakage | Ioff | 5 | µA | VI or VO = 0 to 5.5 V, VCC = 0 V, -40°C to 125°C | 7 | ||
| Input capacitance | Ci | 2 | pF | VI = VCC or GND, VCC = 3.3 V, TA = 25°C | 7 | ||
| Junction-to-ambient thermal resistance | RθJA | 98.7 | °C/W | DB package, 20 pins | 6 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 60.4 | °C/W | DB package, 20 pins | 6 | ||
| Junction-to-board thermal resistance | RθJB | 56.9 | °C/W | DB package, 20 pins | 6 | ||
| Junction-to-top characterization parameter | ψJT | 21.6 | °C/W | DB package, 20 pins | 6 | ||
| Junction-to-board characterization parameter | ψJB | 53.5 | °C/W | DB package, 20 pins | 6 | ||
| Pulse duration, CLR low | tw | 5.5 | ns | VCC = 5 V ± 0.5 V, -40°C to 125°C | 8 | ||
| Pulse duration, CLK high or low | tw | 5.5 | ns | VCC = 5 V ± 0.5 V, -40°C to 125°C | 8 | ||
| Setup time, data before CLK↑ | tsu | 6 | ns | Data, VCC = 5 V ± 0.5 V, -40°C to 125°C | 8 | ||
| Hold time, data after CLK↑ | th | 2 | ns | VCC = 5 V ± 0.5 V, -40°C to 125°C | 8 | ||
| Maximum clock frequency | fmax | 100 | MHz | CL = 15 pF, VCC = 5 V ± 0.5 V, -40°C to 125°C | 9 | ||
| Propagation delay CLK to Q | tpd | 1 | 11.5 | ns | CL = 15 pF, VCC = 5 V ± 0.5 V, -40°C to 125°C | 9 | |
| Propagation delay CLK to Q | tpd | 1 | 17.5 | ns | CL = 15 pF, VCC = 3.3 V ± 0.3 V, -40°C to 125°C | 8 | |
| Propagation delay CLK to Q | tpd | 1 | 22.5 | ns | CL = 15 pF, VCC = 2.5 V ± 0.2 V, -40°C to 125°C | 8 | |
| Power dissipation capacitance | Cpd | 15.9 | pF | CL = 50 pF, f = 10 MHz, VCC = 3.3 V, TA = 25°C | 9 | ||
| Power dissipation capacitance | Cpd | 17.1 | pF | CL = 50 pF, f = 10 MHz, VCC = 5 V, TA = 25°C | 9 |
CAD (KiCad official)
- Symbol:
SN74LV273ADBR - Footprint:
Package_SO:SSOP-20_5.3x7.2mm_P0.65mm - 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74lv273adbr-etched.step/sn74lv273adbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv273adbr.step/sn74lv273adbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (44 pp, sha256
a42f1df2ed1750a1, retrieved 2026-10-23, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).