# SN74LV221APWR

**Texas Instruments** · Monostable Multivibrators · TSSOP-16

SN74LV221APWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Channel 1 falling-edge trigger input when 1B is high; hold low when using the other input methods. |
| 2 | 1B | input | Channel 1 rising-edge trigger input when 1A is low; hold high when using the other input methods. |
| 3 | 1CLR | input | Channel 1 clear input: a rising edge triggers when 1A is low and 1B is high, and driving it low during the output pulse cuts the pulse short; hold high for other input methods. |
| 4 | ~{1Q} | output | Channel 1 inverted output of the monostable multivibrator. |
| 5 | 2Q | output | Channel 2 output of the monostable multivibrator. |
| 6 | 2Cext | passive | Channel 2 external capacitor negative connection; the datasheet lists no electrical type for this pin. |
| 7 | 2Rext/Cext | passive | Channel 2 external capacitor and resistor junction connection, where the timing capacitor connects to Cext and the timing resistor connects to VCC. |
| 8 | GND | power_in | Ground. |
| 9 | 2A | input | Channel 2 falling-edge trigger input when 2B is high; hold low when using the other input methods. |
| 10 | 2B | input | Channel 2 rising-edge trigger input when 2A is low; hold high when using the other input methods. |
| 11 | 2CLR | input | Channel 2 clear input: a rising edge triggers when 2A is low and 2B is high, and driving it low during the output pulse cuts the pulse short; hold high for other input methods. |
| 12 | ~{2Q} | output | Channel 2 inverted output of the monostable multivibrator. |
| 13 | 1Q | output | Channel 1 output of the monostable multivibrator. |
| 14 | 1Cext | passive | Channel 1 external capacitor negative connection; the datasheet lists no electrical type for this pin. |
| 15 | 1Rext/Cext | passive | Channel 1 external capacitor and resistor junction connection, where the timing capacitor connects to Cext and the timing resistor connects to VCC. |
| 16 | VCC | power_in | Power supply, 2 V to 5.5 V operation per the recommended operating conditions. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `SN74LV221APWR`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `sn74lv221apwr-etched.step` / `sn74lv221apwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lv221apwr.step` / `sn74lv221apwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74lv221a.pdf) (31 pp, sha256 `8e179f4af7bb64d9`, retrieved 2026-10-07, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74lv221apwr-datasheet.pdf)