component

SN74LV21APWR

Public Made by Adom

by adom

Texas Instruments Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicsn74lv21apwrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs sn74lv21apwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5h ago
viewers sn74lv21apwr: viewers · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Initial commit: component/sn74lv21apwr · Ray 8d ago
sn74lv21apwr-etched.fit.json sn74lv21apwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5h ago
sn74lv21apwr-etched.glb sn74lv21apwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5h ago
sn74lv21apwr-etched.step sn74lv21apwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5h ago
sn74lv21apwr.glb Publish 0.1.0 · Ray 8d ago
sn74lv21apwr.kicad_mod Publish 0.1.0 · Ray 8d ago
sn74lv21apwr.kicad_sym Publish 0.1.0 · Ray 8d ago
sn74lv21apwr.lbr Publish 0.1.0 · Ray 8d ago
sn74lv21apwr.step Publish 0.1.0 · Ray 8d ago

SN74LV21APWR

Texas Instruments · Logic Gates · TSSOP-14

SN74LV21APWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input 1A input to first 4-input AND gate
2 1B input 1B input to first 4-input AND gate
3 NC unconnected Not internally connected
4 1C input 1C input to first 4-input AND gate
5 1D input 1D input to first 4-input AND gate
6 1Y output 1Y output from first 4-input AND gate
7 GND power_in Ground
8 2Y output 2Y output from second 4-input AND gate
9 2A input 2A input to second 4-input AND gate
10 2B input 2B input to second 4-input AND gate
11 NC unconnected Not internally connected
12 2C input 2C input to second 4-input AND gate
13 2D input 2D input to second 4-input AND gate
14 VCC power_in Power supply (2V to 5.5V)

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74LV21APWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74lv21apwr-etched.step / sn74lv21apwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lv21apwr.step / sn74lv21apwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 6cf9dce71cfece45, retrieved 2026-09-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF