component
SN74LV1T32DCKR
Public Made by Adomby adom
Texas Instruments Logic Gates, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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SN74LV1T32DCKR
Texas Instruments · Logic Gates · SC-70-5
SN74LV1T32DCKR from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Input A of the 2-input OR gate, a 5V-tolerant input whose thresholds are referenced to VCC. |
| 2 | B | input | Input B of the 2-input OR gate, a 5V-tolerant input whose thresholds are referenced to VCC. |
| 3 | GND | power_in | Ground reference for the device. |
| 4 | Y | output | OR-gate output Y, a balanced CMOS push-pull output with 8 mA drive at 5.0 V VCC. |
| 5 | VCC | power_in | Positive supply with an operating range of 1.8 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SC-70-5 |
| Category | Logic |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | 7 | V | 6 | ||
| Input voltage range | VI | -0.5 | 7 | V | 6 | ||
| Voltage applied to any output in high-impedance or power-off state | VO | -0.5 | 4.6 | V | 6 | ||
| Voltage applied to any output in high or low state | VO | -0.5 | V | high or low state; max printed as VCC + 0.5 V | 6 | ||
| Input clamp current | IIK | -20 | mA | VI < 0 | 6 | ||
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 6 | |
| Continuous output current | IO | -25 | 25 | mA | 6 | ||
| Continuous current through VCC or GND | -50 | 50 | mA | through VCC or GND | 6 | ||
| Junction temperature | TJ | 150 | °C | 6 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 6 | ||
| Supply voltage | VCC | 1.6 | 5.5 | V | 6 | ||
| Input voltage | VI | 0 | 5.5 | V | 6 | ||
| Output voltage | VO | 0 | V | max printed as VCC | 6 | ||
| High-level output current | IOH | -3 | mA | VCC = 1.8 V | 6 | ||
| High-level output current | IOH | -5 | mA | VCC = 2.5 V | 6 | ||
| High-level output current | IOH | -7 | mA | VCC = 3.3 V | 6 | ||
| High-level output current | IOH | -8 | mA | VCC = 5.0 V | 6 | ||
| Low-level output current | IOL | 3 | mA | VCC = 1.8 V | 6 | ||
| Low-level output current | IOL | 5 | mA | VCC = 2.5 V | 6 | ||
| Low-level output current | IOL | 7 | mA | VCC = 3.3 V | 6 | ||
| Low-level output current | IOL | 8 | mA | VCC = 5.0 V | 6 | ||
| Input transition rise or fall rate | Δt/Δv | 20 | ns/V | VCC = 1.8 V | 6 | ||
| Operating free-air temperature | TA | -40 | 125 | °C | 6 | ||
| Junction-to-ambient thermal resistance (DCK) | RθJA | 289.2 | °C/W | DCK 5-pin package | 7 | ||
| High-level input voltage | VIH | 0.99 | V | VCC = 2.0 V; TA = 25°C | 7 | ||
| High-level input voltage | VIH | 1.03 | V | VCC = 2.0 V; TA = -40°C to 125°C | 7 | ||
| High-level input voltage | VIH | 1.35 | V | VCC = 3 V to 3.3 V; TA = 25°C | 7 | ||
| High-level input voltage | VIH | 1.37 | V | VCC = 3 V to 3.3 V; TA = -40°C to 125°C | 7 | ||
| High-level input voltage | VIH | 2.02 | V | VCC = 4.5 V to 5.0 V; TA = 25°C | 7 | ||
| High-level input voltage | VIH | 2.03 | V | VCC = 4.5 V to 5.0 V; TA = -40°C to 125°C | 7 | ||
| Low-level input voltage | VIL | 0.58 | V | VCC = 1.65 V to 2.0 V; TA = 25°C | 7 | ||
| Low-level input voltage | VIL | 0.55 | V | VCC = 1.65 V to 2.0 V; TA = -40°C to 125°C | 7 | ||
| Low-level input voltage | VIL | 0.8 | V | VCC = 3 V to 3.6 V; TA = 25°C | 7 | ||
| Low-level input voltage | VIL | 0.65 | V | VCC = 3 V to 3.6 V; TA = -40°C to 125°C | 7 | ||
| High-level output voltage | VOH | 2.9 | V | IOH = -5.5 mA; VCC = 3.3 V; TA = 25°C | 7 | ||
| High-level output voltage | VOH | 2.8 | V | IOH = -5.5 mA; VCC = 3.3 V; TA = -40°C to 125°C | 7 | ||
| High-level output voltage | VOH | 4.6 | V | IOH = -8 mA; VCC = 5.0 V; TA = 25°C | 7 | ||
| High-level output voltage | VOH | 4.5 | V | IOH = -8 mA; VCC = 5.0 V; TA = -40°C to 125°C | 7 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 3 mA; VCC = 3.0 V; TA = 25°C | 7 | ||
| Low-level output voltage | VOL | 0.15 | V | IOL = 3 mA; VCC = 3.0 V; TA = -40°C to 125°C | 7 | ||
| Low-level output voltage | VOL | 0.2 | V | IOL = 4 mA; VCC = 4.5 V; TA = -40°C to 125°C | 7 | ||
| Input leakage current | II | -1 | 0.1 | 1 | µA | VI = 0 V or VCC; VCC = 0 V, 1.8 V, 2.5 V, 3.3 V, 5.5 V | 7 |
| Quiescent supply current | ICC | 1 | 10 | µA | VI = 0 V or VCC, IO = 0; open on loading; VCC = 5.0 V | 7 | |
| Additional quiescent supply current per input | ΔICC | 1.35 | 1.5 | mA | One input at 0.3 V or 3.4 V, other inputs at 0 or VCC, IO = 0; VCC = 5.5 V | 7 | |
| Input capacitance | Ci | 2 | 10 | pF | VI = VCC or GND; VCC = 3.3 V | 8 | |
| Output capacitance | Co | 2.5 | 2.5 | pF | VO = VCC or GND; VCC = 3.3 V | 8 | |
| Propagation delay Any In to Y | tpd | 5 | ns | VCC = 5.0 V; CL = 15 pF; TA = -65°C to 125°C | 8 | ||
| Propagation delay Any In to Y | tpd | 7 | ns | VCC = 5.0 V; CL = 30 pF; TA = -65°C to 125°C | 8 | ||
| Propagation delay Any In to Y | tpd | 5.5 | ns | VCC = 3.3 V; CL = 15 pF; TA = -65°C to 125°C | 8 | ||
| Propagation delay Any In to Y | tpd | 6.5 | ns | VCC = 3.3 V; CL = 30 pF; TA = -65°C to 125°C | 8 | ||
| Propagation delay Any In to Y | tpd | 7.5 | ns | VCC = 2.5 V; CL = 15 pF; TA = -65°C to 125°C | 8 | ||
| Propagation delay Any In to Y | tpd | 8.5 | ns | VCC = 2.5 V; CL = 30 pF; TA = -65°C to 125°C | 8 | ||
| Propagation delay Any In to Y | tpd | 12 | ns | VCC = 1.8 V; CL = 15 pF; TA = -65°C to 125°C | 8 | ||
| Propagation delay Any In to Y | tpd | 14 | ns | VCC = 1.8 V; CL = 30 pF; TA = -65°C to 125°C | 8 |
CAD (KiCad official)
- Symbol:
SN74LV1T32DCKR - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files:
sn74lv1t32dckr-etched.step/sn74lv1t32dckr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv1t32dckr.step/sn74lv1t32dckr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (27 pp, sha256
c0cc02875351273a, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).