main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs sn74lv1t125dckr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json sn74lv1t125dckr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray
README.md sn74lv1t125dckr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sn74lv1t125dckr-etched.fit.json sn74lv1t125dckr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn74lv1t125dckr-etched.glb sn74lv1t125dckr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray
sn74lv1t125dckr-etched.step sn74lv1t125dckr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray
sn74lv1t125dckr.glb Publish 0.1.0 · Ray
sn74lv1t125dckr.kicad_mod Publish 0.1.0 · Ray
sn74lv1t125dckr.kicad_sym Publish 0.1.0 · Ray
sn74lv1t125dckr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
sn74lv1t125dckr.step Publish 0.1.0 · Ray

SN74LV1T125DCKR

Texas Instruments · Buffer/Driver/Transceiver · SC-70-5

SN74LV1T125DCKR from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Output enable, active low. When OE is low, the buffer drives Y from A; when OE is high, Y is placed in high-impedance (3-state).
2 A input Logic data input A. Level-shifted CMOS input with reduced VIH threshold (e.g. VIH min ~1.37 V at VCC = 3.3 V) allowing 1.8 V logic to drive a 3.3 V VCC device. 5.0 V tolerant.
3 GND power_in Device ground reference (0 V).
4 Y tri_state Buffered CMOS push-pull output referenced to VCC. Drives 8 mA at 5 V, 7 mA at 3.3 V, 3 mA at 1.8 V. Enters high-impedance when OE is high.
5 VCC power_in Positive supply, 1.8 V to 5.5 V recommended (absolute max 7.0 V). Output logic levels are referenced to VCC.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SC-70-5
Category Logic
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • SN74LV1T125DCKR
  • SN74LV1T125DCKRDCKT
  • SN74LV1T125DCKRDBVR
  • SN74LV1T125DCKRDBVT

CAD (KiCad official)

  • Symbol: SN74LV1T125DCKR
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SC-70-5 (KiCad packages3D, STEP)
  • 3D model files: sn74lv1t125dckr-etched.step / sn74lv1t125dckr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lv1t125dckr.step / sn74lv1t125dckr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sn74lv1t125dckr.step 87 KB You want the bare part, or you mark your own boards.
sn74lv1t125dckr-etched.step 2.2 MB You want the part with SN74LV1T125DCKR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 564 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 9015da94e1d20a4c, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF