SN74LV1T125DCKR

@@ -0,0 +1,47 @@+# SN74LV1T125DCKR++**Texas Instruments** · Buffer/Driver/Transceiver · SC-70-5++SN74LV1T125DCKR from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OE | input | Output enable, active low. When OE is low, the buffer drives Y from A; when OE is high, Y is placed in high-impedance (3-state). |+| 2 | A | input | Logic data input A. Level-shifted CMOS input with reduced VIH threshold (e.g. VIH min ~1.37 V at VCC = 3.3 V) allowing 1.8 V logic to drive a 3.3 V VCC device. 5.0 V tolerant. |+| 3 | GND | power_in | Device ground reference (0 V). |+| 4 | Y | tri_state | Buffered CMOS push-pull output referenced to VCC. Drives 8 mA at 5 V, 7 mA at 3.3 V, 3 mA at 1.8 V. Enters high-impedance when OE is high. |+| 5 | VCC | power_in | Positive supply, 1.8 V to 5.5 V recommended (absolute max 7.0 V). Output logic levels are referenced to VCC. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SC-70-5 |+| Category | Logic |+| Pins | 5 |++## Ordering variants++- `SN74LV1T125DCKRDCKR`+- `SN74LV1T125DCKRDCKT`+- `SN74LV1T125DCKRDBVR`+- `SN74LV1T125DCKRDBVT`++## CAD (KiCad official)++- Symbol: `SN74LV1T125DCKR`+- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`+- 3D model: SC-70-5 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74lv1t125.pdf) (26 pp, sha256 `9015da94e1d20a4c`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74lv1t125dckr-datasheet.pdf)

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