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SN74LV165ADBR
Public Made by Adomby adom
Texas Instruments Shift Registers, SSOP-16-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LV165ADBR
Texas Instruments · Shift Registers · SSOP-16-208mil
SN74LV165ADBR from Texas Instruments, in a SSOP-16-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SH/LD | input | Shift/Load control input; enables parallel data load when low, shift mode when high. |
| 2 | CLK | input | Storage clock input; low-to-high transition when SH/LD high and CLK INH low accomplishes clocking. |
| 3 | E | input | Parallel data input E for stage E; enabled when SH/LD is low. |
| 4 | F | input | Parallel data input F for stage F; enabled when SH/LD is low. |
| 5 | G | input | Parallel data input G for stage G; enabled when SH/LD is low. |
| 6 | H | input | Parallel data input H for stage H; enabled when SH/LD is low. |
| 7 | QH | output | Inverted serial output from register stage H. |
| 8 | GND | power_in | Ground reference pin. |
| 9 | QH | output | Serial output from register stage H; data shifts through this output during shift mode. |
| 10 | SER | input | Serial data input; data entered here is shifted into stage A during shift mode. |
| 11 | A | input | Parallel data input A for stage A; enabled when SH/LD is low. |
| 12 | B | input | Parallel data input B for stage B; enabled when SH/LD is low. |
| 13 | C | input | Parallel data input C for stage C; enabled when SH/LD is low. |
| 14 | D | input | Parallel data input D for stage D; enabled when SH/LD is low. |
| 15 | CLK INH | input | Clock inhibit input; clocking occurs when CLK INH is low and CLK transitions high; functions interchangeable with CLK. |
| 16 | VCC | power_in | Positive power supply pin; supports 2 V to 5.5 V operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-16-208mil |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN74LV165ADBR - Footprint:
Package_SO:SSOP-16_5.3x6.2mm_P0.65mm - 3D model: SSOP-16-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74lv165adbr-etched.step/sn74lv165adbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv165adbr.step/sn74lv165adbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
be207039d7761149, retrieved 2026-09-26, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).