component
SN74LV161APWR
Public Made by Adomby adom
Texas Instruments Counters, Dividers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"description": "Texas Instruments Counters, Dividers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"component": {
"mpn": "SN74LV161APWR",
"manufacturer": "Texas Instruments",
"package": "TSSOP-16",
"pin_count": 16,
"category": "Logic",
"subcategory": "Counters, Dividers",
"datasheet": "https://www.ti.com/lit/ds/symlink/sn74lv161a.pdf",
"parts": {
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"distributor_links": {
"lcsc": 2649404,
"digikey": "296-12344-2-ND",
"mouser": "595-SN74LV161APWR"
},
"distributor_check": {
"checked_at": "2026-10-05T20:10:23Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-12344-2-ND",
"status": "found"
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"pn": "595-SN74LV161APWR",
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},
"pins": [
{
"number": "1",
"name": "CLR",
"type": "input",
"description": "Asynchronous active-low clear that sets all four flip-flop outputs low regardless of CLK, LOAD or enable inputs."
},
{
"number": "2",
"name": "CLK",
"type": "input",
"description": "Buffered clock input that triggers the four flip-flops on the rising (positive-going) edge."
},
{
"number": "3",
"name": "A",
"type": "input",
"description": "Preset data input A, loaded to QA on the next clock pulse when LOAD is low."
},
{
"number": "4",
"name": "B",
"type": "input",
"description": "Preset data input B, loaded to QB on the next clock pulse when LOAD is low."
},
{
"number": "5",
"name": "C",
"type": "input",
"description": "Preset data input C, loaded to QC on the next clock pulse when LOAD is low."
},
{
"number": "6",
"name": "D",
"type": "input",
"description": "Preset data input D, loaded to QD on the next clock pulse when LOAD is low."
},
{
"number": "7",
"name": "ENP",
"type": "input",
"description": "Count-enable input; both ENP and ENT must be high to count, and transitions are allowed regardless of CLK level."
},
{
"number": "8",
"name": "GND",
"type": "power_in",
"description": "Ground."
},
{
"number": "9",
"name": "LOAD",
"type": "input",
"description": "Synchronous active-low load input that disables counting and presets outputs to A-D data after the next clock pulse."
},
{
"number": "10",
"name": "ENT",
"type": "input",
"description": "Count-enable input that must be high to count and is fed forward to enable RCO."
},
{
"number": "11",
"name": "QD",
"type": "output",
"description": "Counter output D; drive up to ±12 mA at VCC = 4.5 V to 5.5 V."
},
{
"number": "12",
"name": "QC",
"type": "output",
"description": "Counter output C; drive up to ±12 mA at VCC = 4.5 V to 5.5 V."
},
{
"number": "13",
"name": "QB",
"type": "output",
"description": "Counter output B; drive up to ±12 mA at VCC = 4.5 V to 5.5 V."
},
{
"number": "14",
"name": "QA",
"type": "output",
"description": "Counter output A; drive up to ±12 mA at VCC = 4.5 V to 5.5 V."
},
{
"number": "15",
"name": "RCO",
"type": "output",
"description": "Ripple-carry output that produces a high-level pulse at maximum count (9 or 15 with QA high) to enable cascaded stages."
},
{
"number": "16",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage, 2 V to 5.5 V recommended operating range (absolute maximum 7 V)."
}
],
"provenance": {
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"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-4-5-20251001",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
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"at": "2026-10-05T20:10:07"
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"url": "https://www.ti.com/lit/ds/symlink/sn74lv161a.pdf",
"pages": 28,
"sha256": "964a83f61a59c69c",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
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