# SN74LV126APWR

**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · TSSOP-14

SN74LV126APWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable for channel 1; when low, output 1Y is disabled to high impedance, and when high the buffer passes 1A to 1Y. |
| 2 | 1A | input | Data input for channel 1; inputs are 5.5V tolerant at any valid VCC, allowing translation down to VCC. |
| 3 | 1Y | output | 3-state buffer output for channel 1, high impedance when 1OE is low. |
| 4 | 2OE | input | Output enable for channel 2; when low, output 2Y is disabled to high impedance, and when high the buffer passes 2A to 2Y. |
| 5 | 2A | input | Data input for channel 2; inputs are 5.5V tolerant at any valid VCC, allowing translation down to VCC. |
| 6 | 2Y | output | 3-state buffer output for channel 2, high impedance when 2OE is low. |
| 7 | GND | power_in | Ground reference for the device. |
| 8 | 3Y | output | 3-state buffer output for channel 3, high impedance when 3OE is low. |
| 9 | 3A | input | Data input for channel 3; inputs are 5.5V tolerant at any valid VCC, allowing translation down to VCC. |
| 10 | 3OE | input | Output enable for channel 3; when low, output 3Y is disabled to high impedance, and when high the buffer passes 3A to 3Y. |
| 11 | 4Y | output | 3-state buffer output for channel 4, high impedance when 4OE is low. |
| 12 | 4A | input | Data input for channel 4; inputs are 5.5V tolerant at any valid VCC, allowing translation down to VCC. |
| 13 | 4OE | input | Output enable for channel 4; when low, output 4Y is disabled to high impedance, and when high the buffer passes 4A to 4Y. |
| 14 | VCC | power_in | Positive supply; operating range is 2V to 5.5V per the recommended operating conditions. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `SN74LV126APWR`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `sn74lv126apwr-etched.step` / `sn74lv126apwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lv126apwr.step` / `sn74lv126apwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74lv126a.pdf) (27 pp, sha256 `204663db429773ab`, retrieved 2026-10-08, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74lv126apwr-datasheet.pdf)