component
SN74LV125ATDBR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SSOP-14-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownSN74LV125ATDBR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SSOP-14-208mil
SN74LV125ATDBR from Texas Instruments, in a SSOP-14-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output Enable 1, active low input; output 1Y is high-impedance when this pin is high |
| 2 | 1A | input | Data input 1A; logic level transferred to output 1Y when 1OE is low |
| 3 | 1Y | tri_state | Tri-state output 1Y; follows input 1A when 1OE is low, high-impedance when 1OE is high |
| 4 | 2OE | input | Output Enable 2, active low input; output 2Y is high-impedance when this pin is high |
| 5 | 2A | input | Data input 2A; logic level transferred to output 2Y when 2OE is low |
| 6 | 2Y | tri_state | Tri-state output 2Y; follows input 2A when 2OE is low, high-impedance when 2OE is high |
| 7 | GND | power_in | Ground connection |
| 8 | 3Y | tri_state | Tri-state output 3Y; follows input 3A when 3OE is low, high-impedance when 3OE is high |
| 9 | 3A | input | Data input 3A; logic level transferred to output 3Y when 3OE is low |
| 10 | 3OE | input | Output Enable 3, active low input; output 3Y is high-impedance when this pin is high |
| 11 | 4Y | tri_state | Tri-state output 4Y; follows input 4A when 4OE is low, high-impedance when 4OE is high |
| 12 | 4A | input | Data input 4A; logic level transferred to output 4Y when 4OE is low |
| 13 | 4OE | input | Output Enable 4, active low input; output 4Y is high-impedance when this pin is high |
| 14 | VCC | power_out | Positive power supply voltage; operating range 4.5 V to 5.5 V per section 5.3 |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-14-208mil |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74LV125ATDBR - Footprint:
Package_SO:SSOP-14_5.3x6.2mm_P0.65mm - 3D model: SSOP-14-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74lv125atdbr-etched.step/sn74lv125atdbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv125atdbr.step/sn74lv125atdbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
bbd8646bea3e2b1c, retrieved 2026-09-24, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).