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Contents

README

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SN74LV125APWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-14

SN74LV125APWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output Enable 1, active low input; enables output 1Y when held low; input range 0-5.5 V, logic high threshold VIH = 0.7×VCC typical, input current ±1 µA.
2 1A input Data input 1A to buffer 1; drives output 1Y when 1OE is low; input range 0-5.5 V, logic high threshold VIH = 0.7×VCC typical, input current ±1 µA.
3 1Y tri_state 3-state output from buffer 1; drives 0-VCC with VOH = VCC − 0.1 V typical, VOL = 0.1 V typical, maximum output current ±35 mA per pin, 3-state leakage current ±5 µA.
4 2OE input Output Enable 2, active low input; enables output 2Y when held low; input range 0-5.5 V, logic high threshold VIH = 0.7×VCC typical, input current ±1 µA.
5 2A input Data input 2A to buffer 2; drives output 2Y when 2OE is low; input range 0-5.5 V, logic high threshold VIH = 0.7×VCC typical, input current ±1 µA.
6 2Y tri_state 3-state output from buffer 2; drives 0-VCC with VOH = VCC − 0.1 V typical, VOL = 0.1 V typical, maximum output current ±35 mA per pin, 3-state leakage current ±5 µA.
7 GND power_in Ground reference pin; maximum continuous current 70 mA total through VCC/GND pins; operating free-air temperature range −40 to 125°C.
8 3Y tri_state 3-state output from buffer 3; drives 0-VCC with VOH = VCC − 0.1 V typical, VOL = 0.1 V typical, maximum output current ±35 mA per pin, 3-state leakage current ±5 µA.
9 3A input Data input 3A to buffer 3; drives output 3Y when 3OE is low; input range 0-5.5 V, logic high threshold VIH = 0.7×VCC typical, input current ±1 µA.
10 3OE input Output Enable 3, active low input; enables output 3Y when held low; input range 0-5.5 V, logic high threshold VIH = 0.7×VCC typical, input current ±1 µA.
11 4Y tri_state 3-state output from buffer 4; drives 0-VCC with VOH = VCC − 0.1 V typical, VOL = 0.1 V typical, maximum output current ±35 mA per pin, 3-state leakage current ±5 µA.
12 4A input Data input 4A to buffer 4; drives output 4Y when 4OE is low; input range 0-5.5 V, logic high threshold VIH = 0.7×VCC typical, input current ±1 µA.
13 4OE input Output Enable 4, active low input; enables output 4Y when held low; input range 0-5.5 V, logic high threshold VIH = 0.7×VCC typical, input current ±1 µA.
14 VCC power_in Positive supply voltage pin, 2.0-5.5 V; maximum continuous current 70 mA total through VCC/GND pins; operating free-air temperature range −40 to 125°C.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74LV125APWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74lv125apwr-etched.step / sn74lv125apwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lv125apwr.step / sn74lv125apwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 f33fcc89efebec39, retrieved 2026-09-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF