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Generated by kicad-footprint-generator · KiCad file format 20260206

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sn74lv08ampwrep-hero.glb	sn74lv08ampwrep: hero GLB from the etched model (keeps the MPN mark) · Ray	13d ago
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SN74LV08AMPWREP

Texas Instruments · Logic Gates · TSSOP-14

SN74LV08AMPWREP from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1A	input	Gate 1 input A of the quadruple 2-input AND gate (Y = A·B), with input voltage range 0 to 5.5 V.
2	1B	input	Gate 1 input B of the quadruple 2-input AND gate (Y = A·B), with input voltage range 0 to 5.5 V.
3	1Y	output	Gate 1 output Y = A·B, with continuous output current limited to ±25 mA and outputs disabled under Ioff partial-power-down conditions.
4	2A	input	Gate 2 input A of the quadruple 2-input AND gate (Y = A·B), with input voltage range 0 to 5.5 V.
5	2B	input	Gate 2 input B of the quadruple 2-input AND gate (Y = A·B), with input voltage range 0 to 5.5 V.
6	2Y	output	Gate 2 output Y = A·B, with continuous output current limited to ±25 mA and outputs disabled under Ioff partial-power-down conditions.
7	GND	power_in	Ground pin; unused inputs must be held at VCC or GND to ensure proper device operation.
8	3Y	output	Gate 3 output Y = A·B, with continuous output current limited to ±25 mA and outputs disabled under Ioff partial-power-down conditions.
9	3A	input	Gate 3 input A of the quadruple 2-input AND gate (Y = A·B), with input voltage range 0 to 5.5 V.
10	3B	input	Gate 3 input B of the quadruple 2-input AND gate (Y = A·B), with input voltage range 0 to 5.5 V.
11	4Y	output	Gate 4 output Y = A·B, with continuous output current limited to ±25 mA and outputs disabled under Ioff partial-power-down conditions.
12	4A	input	Gate 4 input A of the quadruple 2-input AND gate (Y = A·B), with input voltage range 0 to 5.5 V.
13	4B	input	Gate 4 input B of the quadruple 2-input AND gate (Y = A·B), with input voltage range 0 to 5.5 V.
14	VCC	power_in	Supply voltage pin; the device is designed for 2 V to 5.5 V VCC operation.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-14
Category	Logic
Pins	14

CAD (KiCad official)

Symbol: SN74LV08AMPWREP
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D, STEP)
3D model files: sn74lv08ampwrep-etched.step / sn74lv08ampwrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lv08ampwrep.step / sn74lv08ampwrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (10 pp, sha256 0f2480986406b12b, retrieved 2026-10-09, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF