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Contents

README

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SN74LS86ADR

Texas Instruments · Logic Gates · SOIC-14

SN74LS86ADR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input A of exclusive-OR gate 1.
2 1B input Input B of exclusive-OR gate 1.
3 1Y output Output Y of exclusive-OR gate 1, Y = A XOR B.
4 2A input Input A of exclusive-OR gate 2.
5 2B input Input B of exclusive-OR gate 2.
6 2Y output Output Y of exclusive-OR gate 2, Y = A XOR B.
7 GND power_in Ground reference pin for the device.
8 3Y output Output Y of exclusive-OR gate 3, Y = A XOR B.
9 3A input Input A of exclusive-OR gate 3.
10 3B input Input B of exclusive-OR gate 3.
11 4Y output Output Y of exclusive-OR gate 4, Y = A XOR B.
12 4A input Input A of exclusive-OR gate 4.
13 4B input Input B of exclusive-OR gate 4.
14 VCC power_in Positive supply voltage pin for the device.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74LS86ADR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ls86adr-etched.step / sn74ls86adr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls86adr.step / sn74ls86adr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 160ba6a9e8ea8c64, retrieved 2026-09-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF