component
SN74LS74ADR
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LS74ADR
Texas Instruments · Flip Flops · SOIC-14
SN74LS74ADR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CLR | input | Asynchronous active-low clear (reset) input for flip-flop 1. Forces 1Q low regardless of clock. TTL-compatible input. |
| 2 | 1D | input | Data input for flip-flop 1. Sampled on the rising edge of 1CLK and transferred to 1Q. TTL-compatible input. |
| 3 | 1CLK | input | Clock input for flip-flop 1. Positive-edge-triggered: 1D is transferred to 1Q on the low-to-high transition. |
| 4 | 1PRE | input | Asynchronous active-low preset (set) input for flip-flop 1. Forces 1Q high regardless of clock. TTL-compatible input. |
| 5 | 1Q | output | True (non-inverted) output of flip-flop 1. Follows 1D after the rising edge of 1CLK; forced high by 1PRE, low by 1CLR. |
| 6 | 1Q_N | output | Complementary (inverted) output of flip-flop 1. Always logical complement of 1Q in normal operation. |
| 7 | GND | power_in | Ground reference (0 V) for the device. |
| 8 | 2Q_N | output | Complementary (inverted) output of flip-flop 2. Always logical complement of 2Q in normal operation. |
| 9 | 2Q | output | True (non-inverted) output of flip-flop 2. Follows 2D after the rising edge of 2CLK; forced high by 2PRE, low by 2CLR. |
| 10 | 2PRE | input | Asynchronous active-low preset (set) input for flip-flop 2. Forces 2Q high regardless of clock. |
| 11 | 2CLK | input | Clock input for flip-flop 2. Positive-edge-triggered: 2D is transferred to 2Q on the low-to-high transition. |
| 12 | 2D | input | Data input for flip-flop 2. Sampled on the rising edge of 2CLK and transferred to 2Q. |
| 13 | 2CLR | input | Asynchronous active-low clear (reset) input for flip-flop 2. Forces 2Q low regardless of clock. |
| 14 | VCC | power_in | Positive supply voltage. Recommended operating range 4.75 V to 5.25 V for the SN74LS74A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
SN74LS74ADRSN74LS74ADRDSN74LS74ADRNSN74LS74ADRNSR
CAD (KiCad official)
- Symbol:
SN74LS74ADR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ls74adr-etched.step/sn74ls74adr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ls74adr.step/sn74ls74adr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (30 pp, sha256
d1f81fe112b34dd0, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).