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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	Publish 0.1.0 · Ray	12d ago
viewers	sn74ls688n: viewers · Ray	12d ago
package.json	Publish 0.1.0 · Ray	12d ago
page.json	Set visibility: public · Ray	12d ago
README.md	Publish 0.1.0 · Ray	12d ago
sn74ls688n-etched.glb	Publish 0.1.0 · Ray	12d ago
sn74ls688n-etched.step	sn74ls688n: factory component page (tier=lcsc) · Ray	12d ago
sn74ls688n-hero.glb	sn74ls688n: hero GLB from the etched model (keeps the MPN mark) · Ray	12d ago
sn74ls688n-hero.overlay.json	Publish 0.1.0 · Ray	12d ago
sn74ls688n.glb	Publish 0.1.0 · Ray	12d ago
sn74ls688n.kicad_mod	Publish 0.1.0 · Ray	12d ago
sn74ls688n.kicad_sym	Publish 0.1.0 · Ray	12d ago
sn74ls688n.lbr	Publish 0.1.0 · Ray	12d ago
sn74ls688n.step	Publish 0.1.0 · Ray	12d ago

SN74LS688N

Texas Instruments · Pre-ordered Chips · PDIP-20

SN74LS688N from Texas Instruments, in a PDIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	G̅	input	Active-low enable input with hysteresis; a high level forces the P=Q output high, and the input is rated up to 7 V.
2	P0	input	P word data input bit 0 with hysteresis, rated up to 7 V.
3	Q0	input	Q word data input bit 0 with hysteresis, rated up to 7 V.
4	P1	input	P word data input bit 1 with hysteresis, rated up to 7 V.
5	Q1	input	Q word data input bit 1 with hysteresis, rated up to 7 V.
6	P2	input	P word data input bit 2 with hysteresis, rated up to 7 V.
7	Q2	input	Q word data input bit 2 with hysteresis, rated up to 7 V.
8	P3	input	P word data input bit 3 with hysteresis, rated up to 7 V.
9	Q3	input	Q word data input bit 3 with hysteresis, rated up to 7 V.
10	GND	power_in	Ground, the network ground terminal to which all voltage values are referenced.
11	P4	input	P word data input bit 4 with hysteresis, rated up to 7 V.
12	Q4	input	Q word data input bit 4 with hysteresis, rated up to 7 V.
13	P5	input	P word data input bit 5 with hysteresis, rated up to 7 V.
14	Q5	input	Q word data input bit 5 with hysteresis, rated up to 7 V.
15	P6	input	P word data input bit 6 with hysteresis, rated up to 7 V.
16	Q6	input	Q word data input bit 6 with hysteresis, rated up to 7 V.
17	P7	input	P word data input bit 7 with hysteresis, rated up to 7 V.
18	Q7	input	Q word data input bit 7 with hysteresis, rated up to 7 V.
19	P=Q	output	Active-low totem-pole identity output that goes low when P equals Q, with recommended IOH of -400 µA and IOL of 24 mA for the SN74LS parts.
20	VCC	power_in	Supply voltage, recommended 4.85 V to 5.25 V for SN74LS688 with an absolute maximum of 7 V.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	PDIP-20
Category	Interface ICs
Pins	20

CAD (KiCad official)

Symbol: SN74LS688N
Footprint: Package_DIP:DIP-20_W7.62mm
3D model: PDIP-20 (KiCad packages3D, STEP)
3D model files: sn74ls688n-etched.step / sn74ls688n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls688n.step / sn74ls688n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (24 pp, sha256 5d405f27e656dcdf, retrieved 2026-10-28, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF