component
SN74LS682N
Public Made by Adomby adom
Texas Instruments Pre-ordered Chips, PDIP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 10d ago |
| viewers | 10d ago |
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| README.md | 10d ago |
| sn74ls682n-etched.glb | 10d ago |
| sn74ls682n-etched.step | 10d ago |
| sn74ls682n-hero.glb | 10d ago |
| sn74ls682n-hero.overlay.json | 10d ago |
| sn74ls682n.glb | 10d ago |
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| sn74ls682n.step | 10d ago |
SN74LS682N
Texas Instruments · Pre-ordered Chips · PDIP-20
SN74LS682N from Texas Instruments, in a PDIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P>Q | output | Active-low totem-pole P greater than Q output, high when enable-free comparison finds P is not greater than Q. |
| 2 | P0 | input | P data input bit 0 of the 8-bit P word, with hysteresis. |
| 3 | Q0 | input | Q data input bit 0 of the 8-bit Q word, with hysteresis and a nominal 20-kΩ pullup resistor on the 'LS682. |
| 4 | P1 | input | P data input bit 1 of the 8-bit P word, with hysteresis. |
| 5 | Q1 | input | Q data input bit 1 of the 8-bit Q word, with hysteresis and a nominal 20-kΩ pullup resistor on the 'LS682. |
| 6 | P2 | input | P data input bit 2 of the 8-bit P word, with hysteresis. |
| 7 | Q2 | input | Q data input bit 2 of the 8-bit Q word, with hysteresis and a nominal 20-kΩ pullup resistor on the 'LS682. |
| 8 | P3 | input | P data input bit 3 of the 8-bit P word, with hysteresis. |
| 9 | Q3 | input | Q data input bit 3 of the 8-bit Q word, with hysteresis and a nominal 20-kΩ pullup resistor on the 'LS682. |
| 10 | GND | power_in | Ground pin. |
| 11 | P4 | input | P data input bit 4 of the 8-bit P word, with hysteresis. |
| 12 | Q4 | input | Q data input bit 4 of the 8-bit Q word, with hysteresis and a nominal 20-kΩ pullup resistor on the 'LS682. |
| 13 | P5 | input | P data input bit 5 of the 8-bit P word, with hysteresis. |
| 14 | Q5 | input | Q data input bit 5 of the 8-bit Q word, with hysteresis and a nominal 20-kΩ pullup resistor on the 'LS682. |
| 15 | P6 | input | P data input bit 6 of the 8-bit P word, with hysteresis. |
| 16 | Q6 | input | Q data input bit 6 of the 8-bit Q word, with hysteresis and a nominal 20-kΩ pullup resistor on the 'LS682. |
| 17 | P7 | input | P data input bit 7 of the 8-bit P word, with hysteresis. |
| 18 | Q7 | input | Q data input bit 7 of the 8-bit Q word, with hysteresis and a nominal 20-kΩ pullup resistor on the 'LS682. |
| 19 | P=Q | output | Active-low totem-pole identity output, low when the P word equals the Q word. |
| 20 | VCC | power_in | Positive supply voltage pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-20 |
| Category | Interface ICs |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74LS682N - Footprint:
Package_DIP:DIP-20_W7.62mm - 3D model: PDIP-20 (KiCad packages3D, STEP)
- 3D model files:
sn74ls682n-etched.step/sn74ls682n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ls682n.step/sn74ls682n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
5d405f27e656dcdf, retrieved 2026-10-30, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).