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SN74LS645-1DWR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LS645-1DWR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil
SN74LS645-1DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIR | input | Direction control input: high transmits A data to the B bus, low transmits B data to the A bus. |
| 2 | A1 | bidirectional | A-bus data I/O 1 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 3 | A2 | bidirectional | A-bus data I/O 2 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 4 | A3 | bidirectional | A-bus data I/O 3 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 5 | A4 | bidirectional | A-bus data I/O 4 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 6 | A5 | bidirectional | A-bus data I/O 5 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 7 | A6 | bidirectional | A-bus data I/O 6 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 8 | A7 | bidirectional | A-bus data I/O 7 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 9 | A8 | bidirectional | A-bus data I/O 8 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 10 | GND | power_in | Ground. |
| 11 | B8 | bidirectional | B-bus data I/O 8 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 12 | B7 | bidirectional | B-bus data I/O 7 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 13 | B6 | bidirectional | B-bus data I/O 6 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 14 | B5 | bidirectional | B-bus data I/O 5 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 15 | B4 | bidirectional | B-bus data I/O 4 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 16 | B3 | bidirectional | B-bus data I/O 3 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 17 | B2 | bidirectional | B-bus data I/O 2 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 18 | B1 | bidirectional | B-bus data I/O 1 with 3-state output and hysteresis at the input; true (non-inverting) transceiver. |
| 19 | G | input | Active-low enable input; when high the device is disabled and the buses are isolated. |
| 20 | VCC | power_in | Positive supply voltage. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74LS645-1DWR - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
sn74ls645-1dwr-etched.step/sn74ls645-1dwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ls645-1dwr.step/sn74ls645-1dwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (23 pp, sha256
d6b51fcf6ad079e0, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).