Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

main

Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	Publish 0.1.0 · Ray	13h ago
viewers	sn74ls640n: viewers · Ray	13h ago
package.json	Publish 0.1.0 · Ray	13h ago
page.json	Set visibility: public · Ray	13h ago
README.md	Publish 0.1.0 · Ray	13h ago
sn74ls640n-etched.glb	Publish 0.1.0 · Ray	13h ago
sn74ls640n-etched.step	sn74ls640n: factory component page (tier=mfr) · Ray	13h ago
sn74ls640n-hero.glb	sn74ls640n: hero GLB from the etched model (keeps the MPN mark) · Ray	13h ago
sn74ls640n-hero.overlay.json	Publish 0.1.0 · Ray	13h ago
sn74ls640n.glb	Publish 0.1.0 · Ray	13h ago
sn74ls640n.kicad_mod	Publish 0.1.0 · Ray	13h ago
sn74ls640n.kicad_sym	Publish 0.1.0 · Ray	13h ago
sn74ls640n.lbr	Publish 0.1.0 · Ray	13h ago
sn74ls640n.step	Publish 0.1.0 · Ray	13h ago

SN74LS640N

Texas Instruments · Buffers / Drivers · PDIP-20

SN74LS640N from Texas Instruments, in a PDIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	DIR	input	Direction control input: high transmits A data to the B bus, low transmits B data (inverted) to the A bus.
2	A1	bidirectional	A-bus data I/O 1 (3-state output, inverting transceiver to B bus).
3	A2	bidirectional	A-bus data I/O 2 (3-state output, inverting transceiver to B bus).
4	A3	bidirectional	A-bus data I/O 3 (3-state output, inverting transceiver to B bus).
5	A4	bidirectional	A-bus data I/O 4 (3-state output, inverting transceiver to B bus).
6	A5	bidirectional	A-bus data I/O 5 (3-state output, inverting transceiver to B bus).
7	A6	bidirectional	A-bus data I/O 6 (3-state output, inverting transceiver to B bus).
8	A7	bidirectional	A-bus data I/O 7 (3-state output, inverting transceiver to B bus).
9	A8	bidirectional	A-bus data I/O 8 (3-state output, inverting transceiver to B bus).
10	GND	power_in	Ground.
11	B8	bidirectional	B-bus data I/O 8 (3-state output, inverting transceiver to A bus).
12	B7	bidirectional	B-bus data I/O 7 (3-state output, inverting transceiver to A bus).
13	B6	bidirectional	B-bus data I/O 6 (3-state output, inverting transceiver to A bus).
14	B5	bidirectional	B-bus data I/O 5 (3-state output, inverting transceiver to A bus).
15	B4	bidirectional	B-bus data I/O 4 (3-state output, inverting transceiver to A bus).
16	B3	bidirectional	B-bus data I/O 3 (3-state output, inverting transceiver to A bus).
17	B2	bidirectional	B-bus data I/O 2 (3-state output, inverting transceiver to A bus).
18	B1	bidirectional	B-bus data I/O 1 (3-state output, inverting transceiver to A bus).
19	G	input	Active-low enable input; when high the device is disabled and the buses are isolated.
20	VCC	power_in	Positive supply voltage.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	PDIP-20
Category	Logic ICs
Pins	20

CAD (KiCad official)

Symbol: SN74LS640N
Footprint: Package_DIP:DIP-20_W7.62mm
3D model: PDIP-20 (KiCad packages3D, STEP)
3D model files: sn74ls640n-etched.step / sn74ls640n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls640n.step / sn74ls640n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (21 pp, sha256 26e250f139497751, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF