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SN74LS541N

Public Made by Adom

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, DIP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LS541N

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · DIP-20

SN74LS541N from Texas Instruments, in a DIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G1̄ input Active-low output-enable input of the 2-input NOR control gate; if either G1̄ or G2̄ is high, all eight outputs are in the high-impedance state.
2 A1 input Data input 1 (hysteresis input) whose non-inverted data appears at output Y1 on the 'LS541.
3 A2 input Data input 2 (hysteresis input) whose non-inverted data appears at output Y2 on the 'LS541.
4 A3 input Data input 3 (hysteresis input) whose non-inverted data appears at output Y3 on the 'LS541.
5 A4 input Data input 4 (hysteresis input) whose non-inverted data appears at output Y4 on the 'LS541.
6 A5 input Data input 5 (hysteresis input) whose non-inverted data appears at output Y5 on the 'LS541.
7 A6 input Data input 6 (hysteresis input) whose non-inverted data appears at output Y6 on the 'LS541.
8 A7 input Data input 7 (hysteresis input) whose non-inverted data appears at output Y7 on the 'LS541.
9 A8 input Data input 8 (hysteresis input) whose non-inverted data appears at output Y8 on the 'LS541.
10 GND power_in Ground, the network ground terminal to which all voltage values are referenced.
11 Y8 tri_state 3-state output 8 following A8 (true data), rated for 24 mA sink and -15 mA source on the SN74LS541.
12 Y7 tri_state 3-state output 7 following A7 (true data), rated for 24 mA sink and -15 mA source on the SN74LS541.
13 Y6 tri_state 3-state output 6 following A6 (true data), rated for 24 mA sink and -15 mA source on the SN74LS541.
14 Y5 tri_state 3-state output 5 following A5 (true data), rated for 24 mA sink and -15 mA source on the SN74LS541.
15 Y4 tri_state 3-state output 4 following A4 (true data), rated for 24 mA sink and -15 mA source on the SN74LS541.
16 Y3 tri_state 3-state output 3 following A3 (true data), rated for 24 mA sink and -15 mA source on the SN74LS541.
17 Y2 tri_state 3-state output 2 following A2 (true data), rated for 24 mA sink and -15 mA source on the SN74LS541.
18 Y1 tri_state 3-state output 1 following A1 (true data), rated for 24 mA sink and -15 mA source on the SN74LS541.
19 G2̄ input Active-low output-enable input of the 2-input NOR control gate; if either G1̄ or G2̄ is high, all eight outputs are in the high-impedance state.
20 VCC power_in Supply voltage, 4.75 V min, 5 V nominal, 5.25 V max for the SN74LS541 (absolute maximum 7 V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package DIP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74LS541N
  • Footprint: Package_DIP:DIP-20_W7.62mm
  • 3D model: DIP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74ls541n-etched.step / sn74ls541n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls541n.step / sn74ls541n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 9788278e6b6fa31f, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF