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SN74LS541DW

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil

SN74LS541DW from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ~{G1} input Active-low output enable 1; when both G̅1 and G̅2 are LOW all eight Y outputs are enabled (non-inverting); when HIGH all Y outputs are forced to high-impedance regardless of data inputs.
2 A1 input Data input 1; VIH ≥ 2.0 V, VIL ≤ 0.8 V; input clamp voltage VIK ≤ −1.5 V at IIK = −18 mA.
3 A2 input Data input 2; VIH ≥ 2.0 V, VIL ≤ 0.8 V; input clamp voltage VIK ≤ −1.5 V at IIK = −18 mA.
4 A3 input Data input 3; VIH ≥ 2.0 V, VIL ≤ 0.8 V; input clamp voltage VIK ≤ −1.5 V at IIK = −18 mA.
5 A4 input Data input 4; VIH ≥ 2.0 V, VIL ≤ 0.8 V; input clamp voltage VIK ≤ −1.5 V at IIK = −18 mA.
6 A5 input Data input 5; VIH ≥ 2.0 V, VIL ≤ 0.8 V; input clamp voltage VIK ≤ −1.5 V at IIK = −18 mA.
7 A6 input Data input 6; VIH ≥ 2.0 V, VIL ≤ 0.8 V; input clamp voltage VIK ≤ −1.5 V at IIK = −18 mA.
8 A7 input Data input 7; VIH ≥ 2.0 V, VIL ≤ 0.8 V; input clamp voltage VIK ≤ −1.5 V at IIK = −18 mA.
9 A8 input Data input 8; VIH ≥ 2.0 V, VIL ≤ 0.8 V; input clamp voltage VIK ≤ −1.5 V at IIK = −18 mA.
10 GND power_in Ground reference; 0 V supply return.
11 Y8 tri_state 3-state non-inverting output 8; VOH ≥ 2.4 V at IOH = −12 mA, VOL ≤ 0.25 V at IOL = 12 mA; forced to high-impedance when G̅1 or G̅2 is HIGH.
12 Y7 tri_state 3-state non-inverting output 7; VOH ≥ 2.4 V at IOH = −12 mA, VOL ≤ 0.25 V at IOL = 12 mA; forced to high-impedance when G̅1 or G̅2 is HIGH.
13 Y6 tri_state 3-state non-inverting output 6; VOH ≥ 2.4 V at IOH = −12 mA, VOL ≤ 0.25 V at IOL = 12 mA; forced to high-impedance when G̅1 or G̅2 is HIGH.
14 Y5 tri_state 3-state non-inverting output 5; VOH ≥ 2.4 V at IOH = −12 mA, VOL ≤ 0.25 V at IOL = 12 mA; forced to high-impedance when G̅1 or G̅2 is HIGH.
15 Y4 tri_state 3-state non-inverting output 4; VOH ≥ 2.4 V at IOH = −12 mA, VOL ≤ 0.25 V at IOL = 12 mA; forced to high-impedance when G̅1 or G̅2 is HIGH.
16 Y3 tri_state 3-state non-inverting output 3; VOH ≥ 2.4 V at IOH = −12 mA, VOL ≤ 0.25 V at IOL = 12 mA; forced to high-impedance when G̅1 or G̅2 is HIGH.
17 Y2 tri_state 3-state non-inverting output 2; VOH ≥ 2.4 V at IOH = −12 mA, VOL ≤ 0.25 V at IOL = 12 mA; forced to high-impedance when G̅1 or G̅2 is HIGH.
18 Y1 tri_state 3-state non-inverting output 1; VOH ≥ 2.4 V at IOH = −12 mA, VOL ≤ 0.25 V at IOL = 12 mA; forced to high-impedance when G̅1 or G̅2 is HIGH.
19 ~{G2} input Active-low output enable 2; when both G̅1 and G̅2 are LOW all eight Y outputs are enabled (non-inverting); when HIGH all Y outputs are forced to high-impedance regardless of data inputs.
20 VCC power_in Positive supply voltage; 4.5 V MIN, 5 V NOM, 5.25 V MAX for SN74LS; absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74LS541DW
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74ls541dw-etched.step / sn74ls541dw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls541dw.step / sn74ls541dw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 9788278e6b6fa31f, retrieved 2026-09-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-4-6 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF