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SN74LS540D

Public Made by Adom

by adom

lingxingic Buffers, Drivers, Receivers, Transceivers, SOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LS540D

lingxingic · Buffers, Drivers, Receivers, Transceivers · SOP-20

SN74LS540D from lingxingic, in a SOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Active-low output enable input 1; a high level on OEn puts the outputs in the high-impedance state.
2 A0 input Data input 0 with built-in clamp diodes.
3 A1 input Data input 1 with built-in clamp diodes.
4 A2 input Data input 2 with built-in clamp diodes.
5 A3 input Data input 3 with built-in clamp diodes.
6 A4 input Data input 4 with built-in clamp diodes.
7 A5 input Data input 5 with built-in clamp diodes.
8 A6 input Data input 6 with built-in clamp diodes.
9 A7 input Data input 7 with built-in clamp diodes.
10 GND power_in Ground (0 V).
11 Y7 tri_state Inverting three-state data output 7, high-impedance when disabled.
12 Y6 tri_state Inverting three-state data output 6, high-impedance when disabled.
13 Y5 tri_state Inverting three-state data output 5, high-impedance when disabled.
14 Y4 tri_state Inverting three-state data output 4, high-impedance when disabled.
15 Y3 tri_state Inverting three-state data output 3, high-impedance when disabled.
16 Y2 tri_state Inverting three-state data output 2, high-impedance when disabled.
17 Y1 tri_state Inverting three-state data output 1, high-impedance when disabled.
18 Y0 tri_state Inverting three-state data output 0, high-impedance when disabled.
19 OE2 input Active-low output enable input 2; a high level on OEn puts the outputs in the high-impedance state.
20 VCC power_in Supply voltage, recommended 2.0 V to 6.0 V (absolute maximum 7.0 V).

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V Tamb=25C 8
Input clamp current IIK -20 20 mA VI<-0.5V or VI>VCC+0.5V 8
Output clamp current IOK -20 20 mA VO<-0.5V or VO>VCC+0.5V 8
Output current IO -35 35 mA -0.5V<VO<VCC+0.5V 8
Supply current ICC 70 mA 8
Ground current IGND -70 mA 8
Storage temperature Tstg -65 150 °C 8
Total power dissipation Ptot 500 mW 8
Soldering temperature SOP/TSSOP TL 260 °C 10 s, SOP/TSSOP 8
Supply voltage VCC 2 5 6 V 8
Input voltage VI 0 V max = VCC 8
Output voltage VO 0 V max = VCC 8
Input rise and fall slew rate Δt/ΔV 625 ns/V VCC=2.0V 8
Input rise and fall slew rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 8
Input rise and fall slew rate Δt/ΔV 83 ns/V VCC=6.0V 8
Operating ambient temperature Tamb -40 125 °C 8
High-level input voltage VIH 1.5 1.2 V VCC=2.0V, Tamb=25C 9
High-level input voltage VIH 3.15 2.4 V VCC=4.5V, Tamb=25C 9
High-level input voltage VIH 4.2 3.2 V VCC=6.0V, Tamb=25C 9
Low-level input voltage VIL 0.5 V VCC=2.0V, Tamb=25C 9
Low-level input voltage VIL 1.35 V VCC=4.5V, Tamb=25C 9
Low-level input voltage VIL 1.8 V VCC=6.0V, Tamb=25C 9
High-level output voltage VOH 1.9 2 V VI=VIH or VIL; IO=-20uA; VCC=2.0V; Tamb=25C 9
High-level output voltage VOH 4.4 4.5 V VI=VIH or VIL; IO=-20uA; VCC=4.5V; Tamb=25C 9
High-level output voltage VOH 5.9 6 V VI=VIH or VIL; IO=-20uA; VCC=6.0V; Tamb=25C 9
High-level output voltage VOH 3.98 4.32 V VI=VIH or VIL; IO=-6.0mA; VCC=4.5V; Tamb=25C 9
High-level output voltage VOH 5.48 5.81 V VI=VIH or VIL; IO=-7.8mA; VCC=6.0V; Tamb=25C 9
Low-level output voltage VOL 0 0.1 V VI=VIH or VIL; IO=20uA; VCC=2.0V; Tamb=25C 9
Low-level output voltage VOL 0.15 0.26 V VI=VIH or VIL; IO=6.0mA; VCC=4.5V; Tamb=25C 9
Low-level output voltage VOL 0.16 0.26 V VI=VIH or VIL; IO=7.8mA; VCC=6.0V; Tamb=25C 9
Input leakage current II -1 1 uA VI=VCC or GND; VCC=6.0V; Tamb=25C 9
Off-state output current IOZ -1 1 uA VI=VIH or VIL; VCC=6.0V; VO=VCC or GND; Tamb=25C 9
Quiescent supply current ICC 8 uA VI=VCC or GND; IO=0A; VCC=6.0V; Tamb=25C 9
High-level output voltage VOH 3.7 V VI=VIH or VIL; IO=-6.0mA; VCC=4.5V; Tamb=-40~+125C 11
High-level output voltage VOH 5.2 V VI=VIH or VIL; IO=-7.8mA; VCC=6.0V; Tamb=-40~+125C 11
Low-level output voltage VOL 0.4 V VI=VIH or VIL; IO=6.0mA; VCC=4.5V; Tamb=-40~+125C 11
Input leakage current II -1 1 uA VI=VCC or GND; VCC=6.0V; Tamb=-40~+125C 11
Off-state output current IOZ -10 10 uA VI=VIH or VIL; VCC=6.0V; VO=VCC or GND; Tamb=-40~+125C 11
Quiescent supply current ICC 160 uA VI=VCC or GND; IO=0A; VCC=6.0V; Tamb=-40~+125C 11
Propagation delay An to Yn tpd 30 100 ns VCC=2.0V; Tamb=25C; CL=50pF 12
Propagation delay An to Yn tpd 11 20 ns VCC=4.5V; Tamb=25C; CL=50pF 12
Propagation delay An to Yn tpd 9 17 ns VCC=6.0V; Tamb=25C; CL=50pF 12
Enable time OEn to Yn ten 52 160 ns VCC=2.0V; Tamb=25C; CL=50pF 12
Enable time OEn to Yn ten 19 32 ns VCC=4.5V; Tamb=25C; CL=50pF 12
Enable time OEn to Yn ten 15 27 ns VCC=6.0V; Tamb=25C; CL=50pF 12
Disable time OEn to Yn tdis 61 160 ns VCC=2.0V; Tamb=25C; CL=50pF 12
Disable time OEn to Yn tdis 22 32 ns VCC=4.5V; Tamb=25C; CL=50pF 12
Disable time OEn to Yn tdis 18 27 ns VCC=6.0V; Tamb=25C; CL=50pF 12
Transition time tt 14 60 ns VCC=2.0V; Tamb=25C; CL=50pF 12
Transition time tt 5 12 ns VCC=4.5V; Tamb=25C; CL=50pF 12
Transition time tt 4 10 ns VCC=6.0V; Tamb=25C; CL=50pF 12
Propagation delay An to Yn tpd 30 ns VCC=4.5V; Tamb=-40~+125C; CL=50pF 14
Enable time OEn to Yn ten 48 ns VCC=4.5V; Tamb=-40~+125C; CL=50pF 14
Disable time OEn to Yn tdis 48 ns VCC=4.5V; Tamb=-40~+125C; CL=50pF 14
Transition time tt 18 ns VCC=4.5V; Tamb=-40~+125C; CL=50pF 14
Input capacitance CI 3.5 pF 9
Power dissipation capacitance CPD 39 pF per buffer; VI=GND to VCC 12

CAD (KiCad official)

  • Symbol: SN74LS540D
  • Footprint: Package_SO:SOP-20_7.5x12.8mm_P1.27mm
  • 3D model: SOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: sn74ls540d-etched.step / sn74ls540d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls540d.step / sn74ls540d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (20 pp, sha256 417348806882f662, retrieved 2026-10-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF