Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SN74LS48DR

lingxingic · Digital Tube Drivers · SOP-16

SN74LS48DR from lingxingic, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B input Data input B of the BCD code.
2 C input Data input C of the BCD code.
3 LT input Active-low lamp test input; with BI/RBO open or high, a low on LT turns all segment outputs on.
4 BI/RBO bidirectional Active-low blanking input/ripple blanking output; a low on BI forces all segment outputs off, and it must be open or high for outputs 0 through 15.
5 RBI input Active-low ripple blanking input; must be open or high if blanking of a decimal zero is not desired.
6 D input Data input D of the BCD code.
7 A input Data input A of the BCD code.
8 GND power_in Ground (0V).
9 e output Segment e data output, active low.
10 d output Segment d data output, active low.
11 c output Segment c data output, active low.
12 b output Segment b data output, active low.
13 a output Segment a data output, active low.
14 g output Segment g data output, active low.
15 f output Segment f data output, active low.
16 VCC power_in Supply voltage, recommended 2.0V to 6.0V (absolute maximum 7.0V).

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOP-16
Category LED Drivers
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 7 V 7
input clamping current IIK 20 mA VI < -0.5V or VI > VCC+0.5V; printed ±20 7
output clamping current IOK 20 mA VO < -0.5V or VO > VCC+0.5V; printed ±20 7
output current IO 25 mA -0.5V < VO < VCC+0.5V; printed ±25 7
supply current ICC 50 mA 7
ground current IGND -50 mA 7
storage temperature Tstg -65 150 ℃ 7
total power dissipation Ptot 500 mW 7
soldering temperature TL 260 ℃ 10s, SOP/TSSOP 7
supply voltage VCC 2 5 6 V 8
input voltage VI 0 V max printed as VCC 8
output voltage VO 0 V max printed as VCC 8
ambient temperature Tamb -40 125 ℃ 8
HIGH-level input voltage VIH 1.5 V VCC=2.0V; Tamb=-40℃ to +125℃ 9
HIGH-level input voltage VIH 3.15 V VCC=4.5V; Tamb=-40℃ to +125℃ 9
HIGH-level input voltage VIH 4.2 V VCC=6.0V; Tamb=-40℃ to +125℃ 9
LOW-level input voltage VIL 0.5 V VCC=2.0V; Tamb=-40℃ to +125℃ 9
LOW-level input voltage VIL 1.35 V VCC=4.5V; Tamb=-40℃ to +125℃ 9
LOW-level input voltage VIL 1.8 V VCC=6.0V; Tamb=-40℃ to +125℃ 9
HIGH-level output voltage VOH 1.9 V VI=VIH or VIL; IO=-20uA; VCC=2.0V; Tamb=-40℃ to +125℃ 9
HIGH-level output voltage VOH 4.4 V VI=VIH or VIL; IO=-20uA; VCC=4.5V; Tamb=-40℃ to +125℃ 9
HIGH-level output voltage VOH 5.9 V VI=VIH or VIL; IO=-20uA; VCC=6.0V; Tamb=-40℃ to +125℃ 9
HIGH-level output voltage VOH 3.98 V VI=VIH or VIL; IO=-4.0mA; VCC=4.5V; Tamb=-40℃ to +125℃ 9
HIGH-level output voltage VOH 5.48 V VI=VIH or VIL; IO=-5.2mA; VCC=6.0V; Tamb=-40℃ to +125℃ 9
LOW-level output voltage VOL 0.1 V VI=VIH or VIL; IO=20uA; VCC=2.0V; Tamb=-40℃ to +125℃ 9
LOW-level output voltage VOL 0.4 V VI=VIH or VIL; IO=4.0mA; VCC=4.5V; Tamb=-40℃ to +125℃ 9
HIGH-level input current IIH 20 uA VCC=6.0V, VI=VCC; Tamb=-40℃ to +125℃ 9
LOW-level input current (A/B/C/D) IIL -20 uA VCC=6.0V, VI=GND; Tamb=-40℃ to +125℃ 9
LOW-level input current (BI/RBO/RBI/LT) IIL -1.2 mA VCC=6.0V, VI=GND; Tamb=-40℃ to +125℃ 9
supply current ICC 13 mA VI=VCC or GND; IO=0A; VCC=6.0V; Tamb=-40℃ to +125℃ 9
HIGH-level input voltage VIH 1.5 1.2 V VCC=2.0V; Tamb=-40℃ to +85℃ 8
HIGH-level input voltage VIH 3.15 2.4 V VCC=4.5V; Tamb=-40℃ to +85℃ 8
HIGH-level input voltage VIH 4.2 3.2 V VCC=6.0V; Tamb=-40℃ to +85℃ 8
LOW-level input voltage VIL 0.8 0.5 V VCC=2.0V; Tamb=-40℃ to +85℃ 8
LOW-level input voltage VIL 2.1 1.35 V VCC=4.5V; Tamb=-40℃ to +85℃ 8
LOW-level input voltage VIL 2.8 1.8 V VCC=6.0V; Tamb=-40℃ to +85℃ 8
HIGH-level output voltage VOH 1.9 2 V VI=VIH or VIL; IO=-20uA; VCC=2.0V; Tamb=-40℃ to +85℃ 8
HIGH-level output voltage VOH 4.4 4.5 V VI=VIH or VIL; IO=-20uA; VCC=4.5V; Tamb=-40℃ to +85℃ 8
HIGH-level output voltage VOH 5.9 6 V VI=VIH or VIL; IO=-20uA; VCC=6.0V; Tamb=-40℃ to +85℃ 8
HIGH-level output voltage VOH 3.98 4.32 V VI=VIH or VIL; IO=-4.0mA; VCC=4.5V; Tamb=-40℃ to +85℃ 8
HIGH-level output voltage VOH 5.48 5.81 V VI=VIH or VIL; IO=-5.2mA; VCC=6.0V; Tamb=-40℃ to +85℃ 8
LOW-level output voltage VOL 0 0.1 V VI=VIH or VIL; IO=20uA; VCC=2.0V; Tamb=-40℃ to +85℃ 8
LOW-level output voltage VOL 0.15 0.33 V VI=VIH or VIL; IO=4.0mA; VCC=4.5V; Tamb=-40℃ to +85℃ 8
LOW-level output voltage VOL 0.16 0.33 V VI=VIH or VIL; IO=5.2mA; VCC=6.0V; Tamb=-40℃ to +85℃ 8
HIGH-level input current IIH 20 uA VCC=6.0V, VI=VCC; Tamb=-40℃ to +85℃ 8
LOW-level input current (A/B/C/D) IIL -20 uA VCC=6.0V, VI=GND; Tamb=-40℃ to +85℃ 8
LOW-level input current (BI/RBO/RBI/LT) IIL -1.2 mA VCC=6.0V, VI=GND; Tamb=-40℃ to +85℃ 8
supply current ICC 13 mA VI=VCC or GND; IO=0A; VCC=6.0V; Tamb=-40℃ to +85℃ 8
HIGH to LOW propagation delay, from A input tPHL 100 ns VCC=5.0V; CL=15pF; RL=4KΩ; Tamb=25℃ 10
HIGH to LOW propagation delay, from RBI input, outputs (a-f only) tPHL 100 ns VCC=5.0V; CL=15pF; RL=4KΩ; Tamb=25℃ 10
LOW to HIGH propagation delay, from A input tPLH 100 ns VCC=5.0V; CL=15pF; RL=4KΩ; Tamb=25℃ 10
LOW to HIGH propagation delay, from RBI input, outputs (a-f only) tPLH 100 ns VCC=5.0V; CL=15pF; RL=4KΩ; Tamb=25℃ 10

CAD (KiCad official)

  • Symbol: SN74LS48DR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74ls48dr-etched.step / sn74ls48dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls48dr.step / sn74ls48dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (15 pp, sha256 e9ec98885f08d810, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF