component
SN74LS374NSR
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LS374NSR
Texas Instruments · Flip Flops · SOIC-20-208mil
SN74LS374NSR from Texas Instruments, in a SOIC-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OC | input | Active-low buffered output-control input; when low the eight 3-state outputs are enabled, and when high they go to high impedance (Z) without affecting the internal flip-flops. |
| 2 | 1Q | tri_state | Bus-driving 3-state output of flip-flop 1, which takes the logic level stored from D on the positive CLK transition and is high-impedance when OC is high. |
| 3 | 1D | input | Data input to flip-flop 1, sampled on the positive transition of CLK. |
| 4 | 2D | input | Data input to flip-flop 2, sampled on the positive transition of CLK. |
| 5 | 2Q | tri_state | Bus-driving 3-state output of flip-flop 2, which is high-impedance when OC is high. |
| 6 | 3Q | tri_state | Bus-driving 3-state output of flip-flop 3, which is high-impedance when OC is high. |
| 7 | 3D | input | Data input to flip-flop 3, sampled on the positive transition of CLK. |
| 8 | 4D | input | Data input to flip-flop 4, sampled on the positive transition of CLK. |
| 9 | 4Q | tri_state | Bus-driving 3-state output of flip-flop 4, which is high-impedance when OC is high. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | CLK | input | Clock input for the '374 flip-flops; Q outputs take the D input states on its positive transition. |
| 12 | 5Q | tri_state | Bus-driving 3-state output of flip-flop 5, which is high-impedance when OC is high. |
| 13 | 5D | input | Data input to flip-flop 5, sampled on the positive transition of CLK. |
| 14 | 6D | input | Data input to flip-flop 6, sampled on the positive transition of CLK. |
| 15 | 6Q | tri_state | Bus-driving 3-state output of flip-flop 6, which is high-impedance when OC is high. |
| 16 | 7Q | tri_state | Bus-driving 3-state output of flip-flop 7, which is high-impedance when OC is high. |
| 17 | 7D | input | Data input to flip-flop 7, sampled on the positive transition of CLK. |
| 18 | 8D | input | Data input to flip-flop 8, sampled on the positive transition of CLK. |
| 19 | 8Q | tri_state | Bus-driving 3-state output of flip-flop 8, which is high-impedance when OC is high. |
| 20 | VCC | power_in | Positive supply voltage pin for the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-208mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74LS374NSR - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74ls374nsr-etched.step/sn74ls374nsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ls374nsr.step/sn74ls374nsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (34 pp, sha256
5d2c396010d2b304, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).