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SN74LS365AN

Public Made by Adom

by adom

lingxingic Buffers, Drivers, Receivers, Transceivers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LS365AN

lingxingic · Buffers, Drivers, Receivers, Transceivers · DIP-16

SN74LS365AN from lingxingic, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Active-LOW output enable input 1; a HIGH on this input (with OE2 at HIGH or X) forces the outputs to the high-impedance OFF-state per the function table.
2 1A input Data input 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
3 1Y tri_state 3-state data output 1, which goes high impedance when the output enable is inactive and is limited to ±35 mA output current.
4 2A input Data input 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
5 2Y tri_state 3-state data output 2, which goes high impedance when the output enable is inactive and is limited to ±35 mA output current.
6 3A input Data input 3; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
7 3Y tri_state 3-state data output 3, which goes high impedance when the output enable is inactive and is limited to ±35 mA output current.
8 GND power_in Ground (0 V) reference for all voltages on the device.
9 4Y tri_state 3-state data output 4, which goes high impedance when the output enable is inactive and is limited to ±35 mA output current.
10 4A input Data input 4; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
11 5Y tri_state 3-state data output 5, which goes high impedance when the output enable is inactive and is limited to ±35 mA output current.
12 5A input Data input 5; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
13 6Y tri_state 3-state data output 6, which goes high impedance when the output enable is inactive and is limited to ±35 mA output current.
14 6A input Data input 6; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
15 OE2 input Active-LOW output enable input 2; a HIGH on this input (with OE1 at HIGH or X) forces the outputs to the high-impedance OFF-state per the function table.
16 VCC power_in Supply voltage, recommended 2.0 V to 6.0 V with 5.0 V typical, and absolute maximum 7.0 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package DIP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 7 V 7
input clamping current IIK -20 20 mA VI < -0.5V or VI > VCC+0.5V 7
output clamping current IOK -20 20 mA VO < -0.5V or VO > VCC+0.5V 7
output current IO -35 35 mA -0.5V < VO < VCC+0.5V 7
supply current ICC 70 mA 7
ground current IGND -70 mA 7
storage temperature Tstg -65 150 ℃ 7
total power dissipation Ptot 500 mW 7
soldering temperature TL 245 ℃ 10s, DIP 7
supply voltage VCC 2 5 6 V 8
input voltage VI 0 V 8
output voltage VO 0 V 8
input transition rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 8
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 8
input transition rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 8
ambient temperature Tamb -40 125 ℃ 8
HIGH-level input voltage VIH 1.5 V Tamb=-40℃ to +125℃; VCC=2.0V 10
HIGH-level input voltage VIH 3.15 V Tamb=-40℃ to +125℃; VCC=4.5V 10
HIGH-level input voltage VIH 4.2 V Tamb=-40℃ to +125℃; VCC=6.0V 10
LOW-level input voltage VIL 0.5 V Tamb=-40℃ to +125℃; VCC=2.0V 10
LOW-level input voltage VIL 1.35 V Tamb=-40℃ to +125℃; VCC=4.5V 10
LOW-level input voltage VIL 1.8 V Tamb=-40℃ to +125℃; VCC=6.0V 10
HIGH-level output voltage VOH 1.9 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-20uA; VCC=2.0V 10
HIGH-level output voltage VOH 4.4 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-20uA; VCC=4.5V 10
HIGH-level output voltage VOH 5.9 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-20uA; VCC=6.0V 10
HIGH-level output voltage VOH 3.7 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-6.0mA; VCC=4.5V 10
HIGH-level output voltage VOH 5.2 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-7.8mA; VCC=6.0V 10
LOW-level output voltage VOL 0.1 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=20uA; VCC=2.0V 10
LOW-level output voltage VOL 0.4 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=6.0mA; VCC=4.5V 10
input leakage current II -1 1 uA Tamb=-40℃ to +125℃; VI=VCC or GND; VCC=6.0V 10
OFF-state output current IOZ -10 10 uA Tamb=-40℃ to +125℃; VI=VIH or VIL; VCC=6.0V; VO=VCC or GND 10
supply current ICC 160 uA Tamb=-40℃ to +125℃; VI=VCC or GND; IO=0A; VCC=6.0V 10
nA to nY propagation delay tpd 145 ns Tamb=-40℃ to +125℃; VCC=2.0V; see Figure 6 13
nA to nY propagation delay tpd 29 ns Tamb=-40℃ to +125℃; VCC=4.5V; see Figure 6 13
nA to nY propagation delay tpd 25 ns Tamb=-40℃ to +125℃; VCC=6.0V; see Figure 6 13
OE to nY enable time ten 225 ns Tamb=-40℃ to +125℃; VCC=2.0V; see Figure 7 13
OE to nY enable time ten 45 ns Tamb=-40℃ to +125℃; VCC=4.5V; see Figure 7 13
OE to nY enable time ten 38 ns Tamb=-40℃ to +125℃; VCC=6.0V; see Figure 7 13
OE to nY disable time tdis 225 ns Tamb=-40℃ to +125℃; VCC=2.0V; see Figure 7 13
OE to nY disable time tdis 45 ns Tamb=-40℃ to +125℃; VCC=4.5V; see Figure 7 13
OE to nY disable time tdis 38 ns Tamb=-40℃ to +125℃; VCC=6.0V; see Figure 7 13
transition time tt 90 ns Tamb=-40℃ to +125℃; VCC=2.0V; see Figure 6 13
transition time tt 18 ns Tamb=-40℃ to +125℃; VCC=4.5V; see Figure 6 13
transition time tt 15 ns Tamb=-40℃ to +125℃; VCC=6.0V; see Figure 6 13
nA to nY propagation delay tpd 30 95 ns Tamb=25℃; CL=50pF; VCC=2.0V; see Figure 6 11
nA to nY propagation delay tpd 11 19 ns Tamb=25℃; CL=50pF; VCC=4.5V; see Figure 6 11
nA to nY propagation delay tpd 9 16 ns Tamb=25℃; CL=50pF; VCC=6.0V; see Figure 6 11
OE to nY enable time ten 47 150 ns Tamb=25℃; CL=50pF; VCC=2.0V; see Figure 7 11
OE to nY enable time ten 17 30 ns Tamb=25℃; CL=50pF; VCC=4.5V; see Figure 7 11
OE to nY enable time ten 14 26 ns Tamb=25℃; CL=50pF; VCC=6.0V; see Figure 7 11
OE to nY disable time tdis 61 150 ns Tamb=25℃; CL=50pF; VCC=2.0V; see Figure 7 11
OE to nY disable time tdis 22 30 ns Tamb=25℃; CL=50pF; VCC=4.5V; see Figure 7 11
OE to nY disable time tdis 18 26 ns Tamb=25℃; CL=50pF; VCC=6.0V; see Figure 7 11
transition time tt 14 60 ns Tamb=25℃; CL=50pF; VCC=2.0V; see Figure 6 11
transition time tt 5 12 ns Tamb=25℃; CL=50pF; VCC=4.5V; see Figure 6 11
transition time tt 4 10 ns Tamb=25℃; CL=50pF; VCC=6.0V; see Figure 6 11
supply current ICC 8 uA Tamb=25℃; VI=VCC or GND; IO=0A; VCC=6.0V 8

CAD (KiCad official)

  • Symbol: SN74LS365AN
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74ls365an-etched.step / sn74ls365an-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls365an.step / sn74ls365an.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (19 pp, sha256 a6d8967fc5cf4149, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF