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SN74LS32N

lingxingic · Logic Gates · DIP-14

SN74LS32N from lingxingic, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input 1A of gate 1; the input has an internal clamp diode, so a current-limiting resistor allows driving it from voltages above VCC.
2 1B input Data input 1B of gate 1; the input has an internal clamp diode, so a current-limiting resistor allows driving it from voltages above VCC.
3 1Y output Data output of gate 1, following the OR truth table (1Y = 1A OR 1B).
4 2A input Data input 2A of gate 2; the input has an internal clamp diode, so a current-limiting resistor allows driving it from voltages above VCC.
5 2B input Data input 2B of gate 2; the input has an internal clamp diode, so a current-limiting resistor allows driving it from voltages above VCC.
6 2Y output Data output of gate 2, following the OR truth table (2Y = 2A OR 2B).
7 GND power_in Ground reference (0 V) for the device.
8 3Y output Data output of gate 3, following the OR truth table (3Y = 3A OR 3B).
9 3A input Data input 3A of gate 3; the input has an internal clamp diode, so a current-limiting resistor allows driving it from voltages above VCC.
10 3B input Data input 3B of gate 3; the input has an internal clamp diode, so a current-limiting resistor allows driving it from voltages above VCC.
11 4Y output Data output of gate 4, following the OR truth table (4Y = 4A OR 4B).
12 4A input Data input 4A of gate 4; the input has an internal clamp diode, so a current-limiting resistor allows driving it from voltages above VCC.
13 4B input Data input 4B of gate 4; the input has an internal clamp diode, so a current-limiting resistor allows driving it from voltages above VCC.
14 VCC power_in Supply voltage: recommended 2.0 V to 6.0 V (typical 5.0 V), absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package DIP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (absolute maximum) VCC -0.5 7 V 7
Input clamp current IIK -20 20 mA VI<-0.5V 或 VI>VCC+0.5V 7
Output clamp current IOK -20 20 mA VO<-0.5V 或 VO>VCC+0.5V 7
Output current IO -25 25 mA -0.5V<VO<VCC+0.5V 7
Supply current (absolute maximum) ICC 50 mA 7
Ground current IGND -50 mA 7
Total power dissipation Ptot 500 mW 7
Storage temperature Tstg -65 150 ℃ 7
Soldering temperature (DIP) TL 245 ℃ 10 秒, DIP 7
Supply voltage (recommended) VCC 2 5 6 V 7
Input voltage (recommended) VI 0 V 7
Output voltage (recommended) VO 0 V 7
Input rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 7
Input rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 7
Input rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 7
Operating ambient temperature Tamb -40 125 ℃ 7
High-level input voltage VIH 1.5 1.2 V Tamb=25℃, GND=0V; VCC=2.0V 8
High-level input voltage VIH 3.15 2.4 V Tamb=25℃, GND=0V; VCC=4.5V 8
High-level input voltage VIH 4.2 3.2 V Tamb=25℃, GND=0V; VCC=6.0V 8
Low-level input voltage VIL 0.8 0.5 V Tamb=25℃, GND=0V; VCC=2.0V 8
Low-level input voltage VIL 2.1 1.35 V Tamb=25℃, GND=0V; VCC=4.5V 8
Low-level input voltage VIL 2.8 1.8 V Tamb=25℃, GND=0V; VCC=6.0V 8
High-level output voltage VOH 1.9 2 V Tamb=25℃, GND=0V; VI=VIH或VIL; IO=-20uA; VCC=2.0V 8
High-level output voltage VOH 4.4 4.5 V Tamb=25℃, GND=0V; VI=VIH或VIL; IO=-20uA; VCC=4.5V 8
High-level output voltage VOH 5.9 6 V Tamb=25℃, GND=0V; VI=VIH或VIL; IO=-20uA; VCC=6.0V 8
High-level output voltage VOH 3.98 4.32 V Tamb=25℃, GND=0V; VI=VIH或VIL; IO=-4.0mA; VCC=4.5V 8
High-level output voltage VOH 5.48 5.81 V Tamb=25℃, GND=0V; VI=VIH或VIL; IO=-5.2mA; VCC=6.0V 8
Low-level output voltage VOL 0 0.1 V Tamb=25℃, GND=0V; VI=VIH或VIL; IO=20uA; VCC=2.0V 8
Low-level output voltage VOL 0.15 0.26 V Tamb=25℃, GND=0V; VI=VIH或VIL; IO=4.0mA; VCC=4.5V 8
Low-level output voltage VOL 0.16 0.26 V Tamb=25℃, GND=0V; VI=VIH或VIL; IO=5.2mA; VCC=6.0V 8
Input leakage current II -1 1 uA Tamb=25℃, GND=0V; VI=VCC或GND; VCC=6.0V 8
Static supply current ICC 2 uA Tamb=25℃, GND=0V; VI=VCC或GND; IO=0A; VCC=6.0V 8
High-level input voltage VIH 1.5 V Tamb=-40℃~+125℃, GND=0V; VCC=2.0V 10
High-level input voltage VIH 3.15 V Tamb=-40℃~+125℃, GND=0V; VCC=4.5V 10
High-level input voltage VIH 4.2 V Tamb=-40℃~+125℃, GND=0V; VCC=6.0V 10
Low-level input voltage VIL 0.5 V Tamb=-40℃~+125℃, GND=0V; VCC=2.0V 10
Low-level input voltage VIL 1.35 V Tamb=-40℃~+125℃, GND=0V; VCC=4.5V 10
Low-level input voltage VIL 1.8 V Tamb=-40℃~+125℃, GND=0V; VCC=6.0V 10
High-level output voltage VOH 1.9 V Tamb=-40℃~+125℃, GND=0V; VI=VIH或VIL; IO=-20uA; VCC=2.0V 10
High-level output voltage VOH 4.4 V Tamb=-40℃~+125℃, GND=0V; VI=VIH或VIL; IO=-20uA; VCC=4.5V 10
High-level output voltage VOH 5.9 V Tamb=-40℃~+125℃, GND=0V; VI=VIH或VIL; IO=-20uA; VCC=6.0V 10
High-level output voltage VOH 3.7 V Tamb=-40℃~+125℃, GND=0V; VI=VIH或VIL; IO=-4.0mA; VCC=4.5V 10
High-level output voltage VOH 5.2 V Tamb=-40℃~+125℃, GND=0V; VI=VIH或VIL; IO=-5.2mA; VCC=6.0V 10
Low-level output voltage VOL 0.1 V Tamb=-40℃~+125℃, GND=0V; VI=VIH或VIL; IO=20uA; VCC=2.0V 10
Low-level output voltage VOL 0.4 V Tamb=-40℃~+125℃, GND=0V; VI=VIH或VIL; IO=4.0mA; VCC=4.5V 10
Input leakage current II -1 1 uA Tamb=-40℃~+125℃, GND=0V; VI=VCC或GND; VCC=6.0V 10
Static supply current ICC 40 uA Tamb=-40℃~+125℃, GND=0V; VI=VCC或GND; IO=0A; VCC=6.0V 10
Propagation delay nA, nB to nY tpd 135 ns Tamb=-40℃~+125℃, GND=0V; 见图5; VCC=2.0V 12
Propagation delay nA, nB to nY tpd 27 ns Tamb=-40℃~+125℃, GND=0V; 见图5; VCC=4.5V 12
Propagation delay nA, nB to nY tpd 23 ns Tamb=-40℃~+125℃, GND=0V; 见图5; VCC=6.0V 12
Output transition time tt 110 ns Tamb=-40℃~+125℃, GND=0V; 见图5; VCC=2.0V 12
Output transition time tt 22 ns Tamb=-40℃~+125℃, GND=0V; 见图5; VCC=4.5V 12
Output transition time tt 19 ns Tamb=-40℃~+125℃, GND=0V; 见图5; VCC=6.0V 12

CAD (KiCad official)

  • Symbol: SN74LS32N
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ls32n-etched.step / sn74ls32n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls32n.step / sn74ls32n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (18 pp, sha256 b6567c881b2e9477, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF