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SN74LS280DR

Public Made by Adom

by adom

lingxingic Parity Generators And Checkers, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LS280DR

lingxingic · Parity Generators And Checkers · SOP-14

SN74LS280DR from lingxingic, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I6 input Data input I6 of the 9-bit odd/even parity generator/checker; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
2 I7 input Data input I7 of the 9-bit odd/even parity generator/checker; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
3 n.c. unconnected Not connected; the datasheet assigns no function to this pin.
4 I8 input Data input I8 of the 9-bit odd/even parity generator/checker; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
5 PE output Even parity output, HIGH when an even number of data inputs (I0 to I8) is HIGH; it can be tied to the data inputs of up to nine parallel devices for word-length expansion.
6 PO output Odd parity output, HIGH when an odd number of data inputs (I0 to I8) is HIGH.
7 GND power_in Ground reference (0 V); all voltages in the datasheet are referenced to this pin.
8 I0 input Data input I0 of the 9-bit odd/even parity generator/checker; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
9 I1 input Data input I1 of the 9-bit odd/even parity generator/checker; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
10 I2 input Data input I2 of the 9-bit odd/even parity generator/checker; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
11 I3 input Data input I3 of the 9-bit odd/even parity generator/checker; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
12 I4 input Data input I4 of the 9-bit odd/even parity generator/checker; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
13 I5 input Data input I5 of the 9-bit odd/even parity generator/checker; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
14 VCC power_in Supply voltage; recommended range is 2.0 V to 6.0 V (5.0 V typical) and the absolute maximum is 7 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 7 V 8
input clamping current IIK -20 20 mA VI < -0.5V or VI > VCC+0.5V 8
output clamping current IOK -20 20 mA VO < -0.5V or VO > VCC+0.5V 8
output current IO -25 25 mA -0.5V < VO < VCC+0.5V 8
supply current ICC 50 mA 8
ground current IGND -50 mA 8
total power dissipation Ptot 500 mW 8
storage temperature Tstg -65 150 ℃ 8
soldering temperature TL 260 ℃ 10s, SOP/TSSOP 8
supply voltage VCC 2 5 6 V 8
input voltage VI 0 V 8
output voltage VO 0 V 8
input transition rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 8
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 8
input transition rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 8
ambient temperature Tamb -40 125 ℃ 8
HIGH-level input voltage VIH 1.5 1.2 V VCC=2.0V; Tamb=25℃ 9
HIGH-level input voltage VIH 3.15 2.4 V VCC=4.5V; Tamb=25℃ 9
HIGH-level input voltage VIH 4.2 3.2 V VCC=6.0V; Tamb=25℃ 9
LOW-level input voltage VIL 0.8 0.5 V VCC=2.0V; Tamb=25℃ 9
LOW-level input voltage VIL 2.1 1.35 V VCC=4.5V; Tamb=25℃ 9
LOW-level input voltage VIL 2.8 1.8 V VCC=6.0V; Tamb=25℃ 9
HIGH-level output voltage VOH 1.9 2 V IO=-20uA; VCC=2.0V; VI = VIH or VIL; Tamb=25℃ 9
HIGH-level output voltage VOH 4.4 4.5 V IO=-20uA; VCC=4.5V; VI = VIH or VIL; Tamb=25℃ 9
HIGH-level output voltage VOH 5.9 6 V IO=-20uA; VCC=6.0V; VI = VIH or VIL; Tamb=25℃ 9
HIGH-level output voltage VOH 3.98 4.32 V IO=-4.0mA; VCC=4.5V; VI = VIH or VIL; Tamb=25℃ 9
HIGH-level output voltage VOH 5.48 5.81 V IO=-5.2mA; VCC=6.0V; VI = VIH or VIL; Tamb=25℃ 9
LOW-level output voltage VOL 0 0.1 V IO=20uA; VCC=2.0V; VI = VIH or VIL; Tamb=25℃ 9
LOW-level output voltage VOL 0.15 0.26 V IO=4.0mA; VCC=4.5V; VI = VIH or VIL; Tamb=25℃ 9
LOW-level output voltage VOL 0.16 0.26 V IO=5.2mA; VCC=6.0V; VI = VIH or VIL; Tamb=25℃ 9
input leakage current II -1 1 uA VI= VCC or GND; VCC=6.0V; Tamb=25℃ 9
supply current ICC 2 uA VI= VCC or GND; IO=0A; VCC=6.0V; Tamb=25℃ 9
HIGH-level input voltage VIH 1.5 V VCC=2.0V; Tamb=-40℃ to +125℃ 11
HIGH-level input voltage VIH 3.15 V VCC=4.5V; Tamb=-40℃ to +125℃ 11
HIGH-level input voltage VIH 4.2 V VCC=6.0V; Tamb=-40℃ to +125℃ 11
LOW-level input voltage VIL 0.5 V VCC=2.0V; Tamb=-40℃ to +125℃ 11
LOW-level input voltage VIL 1.35 V VCC=4.5V; Tamb=-40℃ to +125℃ 11
LOW-level input voltage VIL 1.8 V VCC=6.0V; Tamb=-40℃ to +125℃ 11
HIGH-level output voltage VOH 1.9 V IO=-20uA; VCC=2.0V; VI = VIH or VIL; Tamb=-40℃ to +125℃ 11
HIGH-level output voltage VOH 4.4 V IO=-20uA; VCC=4.5V; VI = VIH or VIL; Tamb=-40℃ to +125℃ 11
HIGH-level output voltage VOH 5.9 V IO=-20uA; VCC=6.0V; VI = VIH or VIL; Tamb=-40℃ to +125℃ 11
HIGH-level output voltage VOH 3.7 V IO=-4.0mA; VCC=4.5V; VI = VIH or VIL; Tamb=-40℃ to +125℃ 11
HIGH-level output voltage VOH 5.2 V IO=-5.2mA; VCC=6.0V; VI = VIH or VIL; Tamb=-40℃ to +125℃ 11
LOW-level output voltage VOL 0.1 V IO=20uA; VCC=2.0V; VI = VIH or VIL; Tamb=-40℃ to +125℃ 11
LOW-level output voltage VOL 0.4 V IO=4.0mA; VCC=4.5V; VI = VIH or VIL; Tamb=-40℃ to +125℃ 11
supply current ICC 160 uA VI= VCC or GND; IO=0A; VCC=6.0V; Tamb=-40℃ to +125℃ 11
In to PE propagation delay tpd 300 ns VCC=2.0V; see Figure 4; Tamb=-40℃ to +125℃ 14
In to PE propagation delay tpd 60 ns VCC=4.5V; see Figure 4; Tamb=-40℃ to +125℃ 14
In to PE propagation delay tpd 51 ns VCC=6.0V; see Figure 4; Tamb=-40℃ to +125℃ 14
In to PO propagation delay tpd 300 ns VCC=2.0V; see Figure 4; Tamb=-40℃ to +125℃ 14
In to PO propagation delay tpd 60 ns VCC=4.5V; see Figure 4; Tamb=-40℃ to +125℃ 14
In to PO propagation delay tpd 51 ns VCC=6.0V; see Figure 4; Tamb=-40℃ to +125℃ 14
transition time tt 110 ns VCC=2.0V; see Figure 4; Tamb=-40℃ to +125℃ 14
transition time tt 22 ns VCC=4.5V; see Figure 4; Tamb=-40℃ to +125℃ 14
transition time tt 19 ns VCC=6.0V; see Figure 4; Tamb=-40℃ to +125℃ 14

CAD (KiCad official)

  • Symbol: SN74LS280DR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ls280dr-etched.step / sn74ls280dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls280dr.step / sn74ls280dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (20 pp, sha256 ad37e11a2022830c, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF