component
SN74LS27N
Public Made by Adomby adom
Texas Instruments Logic Gates, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
SN74LS27N
Texas Instruments · Logic Gates · PDIP-14
SN74LS27N from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 input A; output 1Y goes low when any of 1A, 1B, 1C is high. |
| 2 | 1B | input | Gate 1 input B of the 3-input NOR gate. |
| 3 | 2A | input | Gate 2 input A of the 3-input NOR gate. |
| 4 | 2B | input | Gate 2 input B of the 3-input NOR gate. |
| 5 | 2C | input | Gate 2 input C of the 3-input NOR gate. |
| 6 | 2Y | output | Gate 2 output, high only when 2A, 2B and 2C are all low. |
| 7 | GND | power_in | Ground; supply voltage values are specified with respect to this network ground terminal. |
| 8 | 3Y | output | Gate 3 output, high only when 3A, 3B and 3C are all low. |
| 9 | 3A | input | Gate 3 input A of the 3-input NOR gate. |
| 10 | 3B | input | Gate 3 input B of the 3-input NOR gate. |
| 11 | 3C | input | Gate 3 input C of the 3-input NOR gate. |
| 12 | 1Y | output | Gate 1 output, high only when 1A, 1B and 1C are all low. |
| 13 | 1C | input | Gate 1 input C of the 3-input NOR gate. |
| 14 | VCC | power_in | Supply voltage; absolute maximum 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74LS27N - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ls27n-etched.step/sn74ls27n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ls27n.step/sn74ls27n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
56a0c0d6d7d13982, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74LS27N
**Texas Instruments** · Logic Gates · PDIP-14
SN74LS27N from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 input A; output 1Y goes low when any of 1A, 1B, 1C is high. |
| 2 | 1B | input | Gate 1 input B of the 3-input NOR gate. |
| 3 | 2A | input | Gate 2 input A of the 3-input NOR gate. |
| 4 | 2B | input | Gate 2 input B of the 3-input NOR gate. |
| 5 | 2C | input | Gate 2 input C of the 3-input NOR gate. |
| 6 | 2Y | output | Gate 2 output, high only when 2A, 2B and 2C are all low. |
| 7 | GND | power_in | Ground; supply voltage values are specified with respect to this network ground terminal. |
| 8 | 3Y | output | Gate 3 output, high only when 3A, 3B and 3C are all low. |
| 9 | 3A | input | Gate 3 input A of the 3-input NOR gate. |
| 10 | 3B | input | Gate 3 input B of the 3-input NOR gate. |
| 11 | 3C | input | Gate 3 input C of the 3-input NOR gate. |
| 12 | 1Y | output | Gate 1 output, high only when 1A, 1B and 1C are all low. |
| 13 | 1C | input | Gate 1 input C of the 3-input NOR gate. |
| 14 | VCC | power_in | Supply voltage; absolute maximum 7 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-14 |
| Category | Logic |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `SN74LS27N`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files: `sn74ls27n-etched.step` / `sn74ls27n-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74ls27n.step` / `sn74ls27n.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74ls27) (22 pp, sha256 `56a0c0d6d7d13982`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74ls27n-datasheet.pdf)