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README

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SN74LS27DR

lingxingic · Logic Gates · SOP-14

SN74LS27DR from lingxingic, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input of NOR gate 1; output 1Y is HIGH only when 1A, 1B and 1C are all LOW (inputs include clamp diodes, input clamping current limited to ±20 mA).
2 1B input Data input of NOR gate 1; output 1Y is HIGH only when 1A, 1B and 1C are all LOW (inputs include clamp diodes, input clamping current limited to ±20 mA).
3 2A input Data input of NOR gate 2; output 2Y is HIGH only when 2A, 2B and 2C are all LOW (inputs include clamp diodes, input clamping current limited to ±20 mA).
4 2B input Data input of NOR gate 2; output 2Y is HIGH only when 2A, 2B and 2C are all LOW (inputs include clamp diodes, input clamping current limited to ±20 mA).
5 2C input Data input of NOR gate 2; output 2Y is HIGH only when 2A, 2B and 2C are all LOW (inputs include clamp diodes, input clamping current limited to ±20 mA).
6 2Y output Data output of NOR gate 2; output current limited to ±25 mA (-0.5 V < VO < VCC+0.5 V).
7 GND power_in Ground reference (0 V); all voltages are referenced to GND.
8 3Y output Data output of NOR gate 3; output current limited to ±25 mA (-0.5 V < VO < VCC+0.5 V).
9 3A input Data input of NOR gate 3; output 3Y is HIGH only when 3A, 3B and 3C are all LOW (inputs include clamp diodes, input clamping current limited to ±20 mA).
10 3B input Data input of NOR gate 3; output 3Y is HIGH only when 3A, 3B and 3C are all LOW (inputs include clamp diodes, input clamping current limited to ±20 mA).
11 3C input Data input of NOR gate 3; output 3Y is HIGH only when 3A, 3B and 3C are all LOW (inputs include clamp diodes, input clamping current limited to ±20 mA).
12 1Y output Data output of NOR gate 1; output current limited to ±25 mA (-0.5 V < VO < VCC+0.5 V).
13 1C input Data input of NOR gate 1; output 1Y is HIGH only when 1A, 1B and 1C are all LOW (inputs include clamp diodes, input clamping current limited to ±20 mA).
14 VCC power_in Supply voltage; recommended operating range 2.0 V to 6.0 V, absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 7 V 7
input clamping current IIK -20 20 mA VI < -0.5V or VI > VCC+0.5V 7
output clamping current IOK -20 20 mA VO < -0.5V or VO > VCC+0.5V 7
output current IO -25 25 mA -0.5V < VO < VCC+0.5V 7
supply current ICC 50 mA 7
ground current IGND -50 mA 7
total power dissipation Ptot 500 mW 7
storage temperature Tstg -65 150 ℃ 7
soldering temperature TL 260 ℃ 10s; SOP/TSSOP 7
supply voltage VCC 2 5 6 V 7
input voltage VI 0 V 7
output voltage VO 0 V 7
input transition rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 7
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 7
input transition rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 7
ambient temperature Tamb -40 125 ℃ 7
HIGH-level input voltage VIH 1.5 1.2 V Tamb=25℃; VCC=2.0V 8
HIGH-level input voltage VIH 3.15 2.4 V Tamb=25℃; VCC=4.5V 8
HIGH-level input voltage VIH 4.2 3.2 V Tamb=25℃; VCC=6.0V 8
LOW-level input voltage VIL 0.8 0.5 V Tamb=25℃; VCC=2.0V 8
LOW-level input voltage VIL 2.1 1.35 V Tamb=25℃; VCC=4.5V 8
LOW-level input voltage VIL 2.8 1.8 V Tamb=25℃; VCC=6.0V 8
HIGH-level output voltage VOH 1.9 2 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V 8
HIGH-level output voltage VOH 4.4 4.5 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V 8
HIGH-level output voltage VOH 5.9 6 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V 8
HIGH-level output voltage VOH 3.98 4.32 V Tamb=25℃; VI=VIH or VIL; IO=-4.0mA; VCC=4.5V 8
HIGH-level output voltage VOH 5.48 5.81 V Tamb=25℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V 8
LOW-level output voltage VOL 0 0.1 V Tamb=25℃; VI=VIH or VIL; IO=20uA; VCC=2.0V 8
LOW-level output voltage VOL 0.15 0.26 V Tamb=25℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V 8
LOW-level output voltage VOL 0.16 0.26 V Tamb=25℃; VI=VIH or VIL; IO=5.2mA; VCC=6.0V 8
input leakage current II -1 1 uA Tamb=25℃; VI=VCC or GND; VCC=6.0V 8
supply current ICC 2 uA Tamb=25℃; VI=VCC or GND; IO=0A; VCC=6.0V 8
propagation delay nA, nB, nC to nY tpd 28 90 ns Tamb=25℃; VCC=2.0V; see Figure 5 11
propagation delay nA, nB, nC to nY tpd 10 18 ns Tamb=25℃; VCC=4.5V; see Figure 5 11
propagation delay nA, nB, nC to nY tpd 8 15 ns Tamb=25℃; VCC=6.0V; see Figure 5 11
transition time tt 19 75 ns Tamb=25℃; VCC=2.0V; see Figure 5 11
transition time tt 7 15 ns Tamb=25℃; VCC=4.5V; see Figure 5 11
transition time tt 6 13 ns Tamb=25℃; VCC=6.0V; see Figure 5 11
HIGH-level input voltage VIH 1.5 V Tamb=-40℃ to +125℃; VCC=2.0V 10
HIGH-level input voltage VIH 3.15 V Tamb=-40℃ to +125℃; VCC=4.5V 10
HIGH-level input voltage VIH 4.2 V Tamb=-40℃ to +125℃; VCC=6.0V 10
LOW-level input voltage VIL 0.5 V Tamb=-40℃ to +125℃; VCC=2.0V 10
LOW-level input voltage VIL 1.35 V Tamb=-40℃ to +125℃; VCC=4.5V 10
LOW-level input voltage VIL 1.8 V Tamb=-40℃ to +125℃; VCC=6.0V 10
HIGH-level output voltage VOH 1.9 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V 10
HIGH-level output voltage VOH 4.4 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V 10
HIGH-level output voltage VOH 5.9 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V 10
HIGH-level output voltage VOH 3.7 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-4.0mA; VCC=4.5V 10
HIGH-level output voltage VOH 5.2 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V 10
LOW-level output voltage VOL 0.1 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=20uA; VCC=2.0V 10
LOW-level output voltage VOL 0.4 V Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V 10
input leakage current II -1 1 uA Tamb=-40℃ to +125℃; VI=VCC or GND; VCC=6.0V 10
supply current ICC 40 uA Tamb=-40℃ to +125℃; VI=VCC or GND; IO=0A; VCC=6.0V 10

CAD (KiCad official)

  • Symbol: SN74LS27DR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ls27dr-etched.step / sn74ls27dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls27dr.step / sn74ls27dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (18 pp, sha256 24a79afdc60dee6c, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF