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Generated by kicad-footprint-generator · KiCad file format 20260206

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sn74ls279ansr-etched.step	sn74ls279ansr: factory component page (tier=mfr) · Ray	1d ago
sn74ls279ansr-hero.glb	sn74ls279ansr: hero GLB from the etched model (keeps the MPN mark) · Ray	1d ago
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SN74LS279ANSR

Texas Instruments · Logic ICs · SO-16-208mil

SN74LS279ANSR from Texas Instruments, in a SO-16-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1R	input	Active-low reset input of latch 1; pulsing it low resets the 1Q output low.
2	1S1	input	Active-low set input 1 of latch 1; a low level on either S input sets 1Q high.
3	1S2	input	Active-low set input 2 of latch 1; a low level on either S input sets 1Q high.
4	1Q	output	Output of latch 1, set high by S low and reset low by R low.
5	2R	input	Active-low reset input of latch 2; pulsing it low resets the 2Q output low.
6	2S	input	Active-low set input of latch 2; pulsing it low sets 2Q high.
7	2Q	output	Output of latch 2, set high by S low and reset low by R low.
8	GND	power_in	Ground; supply voltage values are specified with respect to this network ground terminal.
9	3Q	output	Output of latch 3, set high by S low and reset low by R low.
10	3R	input	Active-low reset input of latch 3; pulsing it low resets the 3Q output low.
11	3S1	input	Active-low set input 1 of latch 3; a low level on either S input sets 3Q high.
12	3S2	input	Active-low set input 2 of latch 3; a low level on either S input sets 3Q high.
13	4Q	output	Output of latch 4, set high by S low and reset low by R low.
14	4R	input	Active-low reset input of latch 4; pulsing it low resets the 4Q output low.
15	4S	input	Active-low set input of latch 4; pulsing it low sets 4Q high.
16	VCC	power_in	Supply voltage; absolute maximum 7 V with respect to ground.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SO-16-208mil
Category	Logic ICs
Pins	16

CAD (KiCad official)

Symbol: SN74LS279ANSR
Footprint: Package_SO:SO-16_5.3x10.2mm_P1.27mm
3D model: SO-16-208mil, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.75 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
3D model files: sn74ls279ansr-etched.step / sn74ls279ansr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls279ansr.step / sn74ls279ansr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (19 pp, sha256 4bf69524d06195c5, retrieved 2026-10-29, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF