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SN74LS266N

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Texas Instruments Logic Gates, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LS266N

Texas Instruments · Logic Gates · PDIP-14

SN74LS266N from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Gate 1 input A; high-level input voltage min 2 V, low-level max 0.8 V for SN74LS266.
2 1B input Gate 1 input B; high-level input voltage min 2 V, low-level max 0.8 V for SN74LS266.
3 1Y output Gate 1 open-collector exclusive-NOR output; needs external pull-up, VOH max 5.5 V, IOL max 8 mA for SN74LS266.
4 2Y output Gate 2 open-collector exclusive-NOR output; needs external pull-up, VOH max 5.5 V, IOL max 8 mA for SN74LS266.
5 2A input Gate 2 input A; high-level input voltage min 2 V, low-level max 0.8 V for SN74LS266.
6 2B input Gate 2 input B; high-level input voltage min 2 V, low-level max 0.8 V for SN74LS266.
7 GND power_in Ground, the network ground terminal for all voltage values.
8 3A input Gate 3 input A; high-level input voltage min 2 V, low-level max 0.8 V for SN74LS266.
9 3B input Gate 3 input B; high-level input voltage min 2 V, low-level max 0.8 V for SN74LS266.
10 3Y output Gate 3 open-collector exclusive-NOR output; needs external pull-up, VOH max 5.5 V, IOL max 8 mA for SN74LS266.
11 4Y output Gate 4 open-collector exclusive-NOR output; needs external pull-up, VOH max 5.5 V, IOL max 8 mA for SN74LS266.
12 4A input Gate 4 input A; high-level input voltage min 2 V, low-level max 0.8 V for SN74LS266.
13 4B input Gate 4 input B; high-level input voltage min 2 V, low-level max 0.8 V for SN74LS266.
14 VCC power_in Supply voltage, 4.75 V to 5.25 V recommended (5 V nominal) for SN74LS266, absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74LS266N
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: PDIP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ls266n-etched.step / sn74ls266n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls266n.step / sn74ls266n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (14 pp, sha256 4f127d5093d4f84c, retrieved 2026-10-14, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF