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Contents

README

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SN74LS244NSR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20-208mil

SN74LS244NSR from Texas Instruments, in a SOIC-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1G input Channel 1 output enable input, active-low; when low, data from 1A1-1A4 inputs passes to 1Y1-1Y4 outputs; when high, 1Y outputs are in high impedance state.
2 1A1 input Channel 1 data input, bit 1 (A side); connects to 1Y1 when 1G is low.
3 2Y4 tri_state Channel 2 data output, bit 4 (Y side); tri-state output controlled by 2G; passes data from 2A4 when 2G is low.
4 1A2 input Channel 1 data input, bit 2 (A side); connects to 1Y2 when 1G is low.
5 2Y3 tri_state Channel 2 data output, bit 3 (Y side); tri-state output controlled by 2G; passes data from 2A3 when 2G is low.
6 1A3 input Channel 1 data input, bit 3 (A side); connects to 1Y3 when 1G is low.
7 2Y2 tri_state Channel 2 data output, bit 2 (Y side); tri-state output controlled by 2G; passes data from 2A2 when 2G is low.
8 1A4 input Channel 1 data input, bit 4 (A side); connects to 1Y4 when 1G is low.
9 2Y1 tri_state Channel 2 data output, bit 1 (Y side); tri-state output controlled by 2G; passes data from 2A1 when 2G is low.
10 GND power_in Ground; negative power supply and circuit common reference.
11 2A1 input Channel 2 data input, bit 1 (A side); connects to 2Y1 when 2G is low.
12 1Y4 tri_state Channel 1 data output, bit 4 (Y side); tri-state output controlled by 1G; passes data from 1A4 when 1G is low.
13 2A2 input Channel 2 data input, bit 2 (A side); connects to 2Y2 when 2G is low.
14 1Y3 tri_state Channel 1 data output, bit 3 (Y side); tri-state output controlled by 1G; passes data from 1A3 when 1G is low.
15 2A3 input Channel 2 data input, bit 3 (A side); connects to 2Y3 when 2G is low.
16 1Y2 tri_state Channel 1 data output, bit 2 (Y side); tri-state output controlled by 1G; passes data from 1A2 when 1G is low.
17 2A4 input Channel 2 data input, bit 4 (A side); connects to 2Y4 when 2G is low.
18 1Y1 tri_state Channel 1 data output, bit 1 (Y side); tri-state output controlled by 1G; passes data from 1A1 when 1G is low.
19 2G input Channel 2 output enable input, active-low; when low, data from 2A1-2A4 inputs passes to 2Y1-2Y4 outputs; when high, 2Y outputs are in high impedance state.
20 VCC power_in Positive power supply; connect to 4.75V to 5.25V for SN74LS244.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-208mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74LS244NSR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-208mil (KiCad packages3D, STEP)
  • 3D model files: sn74ls244nsr-etched.step / sn74ls244nsr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls244nsr.step / sn74ls244nsr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 05f3258985319fe3, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF