component
SN74LS244DBR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LS244DBR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SSOP-20-208mil
SN74LS244DBR from Texas Instruments, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1G | input | Channel 1 output enable input, active low; when low enables outputs 1Y1-1Y4, when high outputs are high impedance. |
| 2 | 1A1 | input | Channel 1 data input A1 to non-inverting buffer. |
| 3 | 2Y4 | tri_state | Channel 2 tri-state output Y4; drives input 2A4 when 2G is low, high impedance when 2G is high. |
| 4 | 1A2 | input | Channel 1 data input A2 to non-inverting buffer. |
| 5 | 2Y3 | tri_state | Channel 2 tri-state output Y3; drives input 2A3 when 2G is low, high impedance when 2G is high. |
| 6 | 1A3 | input | Channel 1 data input A3 to non-inverting buffer. |
| 7 | 2Y2 | tri_state | Channel 2 tri-state output Y2; drives input 2A2 when 2G is low, high impedance when 2G is high. |
| 8 | 1A4 | input | Channel 1 data input A4 to non-inverting buffer. |
| 9 | 2Y1 | tri_state | Channel 2 tri-state output Y1; drives input 2A1 when 2G is low, high impedance when 2G is high. |
| 10 | GND | power_in | Ground. |
| 11 | 2A1 | input | Channel 2 data input A1 to non-inverting buffer. |
| 12 | 1Y4 | tri_state | Channel 1 tri-state output Y4; drives input 1A4 when 1G is low, high impedance when 1G is high. |
| 13 | 2A2 | input | Channel 2 data input A2 to non-inverting buffer. |
| 14 | 1Y3 | tri_state | Channel 1 tri-state output Y3; drives input 1A3 when 1G is low, high impedance when 1G is high. |
| 15 | 2A3 | input | Channel 2 data input A3 to non-inverting buffer. |
| 16 | 1Y2 | tri_state | Channel 1 tri-state output Y2; drives input 1A2 when 1G is low, high impedance when 1G is high. |
| 17 | 2A4 | input | Channel 2 data input A4 to non-inverting buffer. |
| 18 | 1Y1 | tri_state | Channel 1 tri-state output Y1; drives input 1A1 when 1G is low, high impedance when 1G is high. |
| 19 | 2G | input | Channel 2 output enable input, active low; when low enables outputs 2Y1-2Y4, when high outputs are high impedance. |
| 20 | VCC | power_out | Power supply positive voltage; recommended 4.75 V to 5.25 V for SN74LS244 at operating temperature 0 to 70°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-20-208mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74LS244DBR - Footprint:
Package_SO:SSOP-20_5.3x7.2mm_P0.65mm - 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74ls244dbr-etched.step/sn74ls244dbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ls244dbr.step/sn74ls244dbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
05f3258985319fe3, retrieved 2026-09-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).