component
SN74LS21N
Public Made by Adomby adom
lingxingic Logic Gates, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
SN74LS21N
lingxingic · Logic Gates · DIP-14
SN74LS21N from lingxingic, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input 1A of the first 4-input AND gate; a LOW level on any input forces 1Y LOW, and the input voltage range is 0 to VCC V. |
| 2 | 1B | input | Data input 1B of the first 4-input AND gate; a LOW level on this input forces 1Y LOW, and the input voltage range is 0 to VCC V. |
| 3 | n.c. | unconnected | Not connected. |
| 4 | 1C | input | Data input 1C of the first 4-input AND gate; a LOW level on this input forces 1Y LOW, and the input voltage range is 0 to VCC V. |
| 5 | 1D | input | Data input 1D of the first 4-input AND gate; a LOW level on this input forces 1Y LOW, and the input voltage range is 0 to VCC V. |
| 6 | 1Y | output | Data output 1Y of the first AND gate, HIGH only when inputs 1A, 1B, 1C and 1D are all HIGH; the output voltage range is 0 to VCC V. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 8 | 2Y | output | Data output 2Y of the second AND gate, HIGH only when inputs 2A, 2B, 2C and 2D are all HIGH; the output voltage range is 0 to VCC V. |
| 9 | 2A | input | Data input 2A of the second 4-input AND gate; a LOW level on this input forces 2Y LOW, and the input voltage range is 0 to VCC V. |
| 10 | 2B | input | Data input 2B of the second 4-input AND gate; a LOW level on this input forces 2Y LOW, and the input voltage range is 0 to VCC V. |
| 11 | n.c. | unconnected | Not connected. |
| 12 | 2C | input | Data input 2C of the second 4-input AND gate; a LOW level on this input forces 2Y LOW, and the input voltage range is 0 to VCC V. |
| 13 | 2D | input | Data input 2D of the second 4-input AND gate; a LOW level on this input forces 2Y LOW, and the input voltage range is 0 to VCC V. |
| 14 | VCC | power_in | Supply voltage; the recommended range is 2.0 V to 6.0 V (typ. 5.0 V), and the absolute maximum is -0.5 V to +7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | DIP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 7 | V | 8 | ||
| input clamping current | IIK | -20 | 20 | mA | VI<-0.5V or VI>VCC+0.5V | 8 | |
| output clamping current | IOK | -20 | 20 | mA | VO<-0.5V or VO>VCC+0.5V | 8 | |
| output current | IO | -25 | 25 | mA | -0.5V<VO<VCC+0.5V | 8 | |
| supply current | ICC | 50 | mA | 8 | |||
| ground current | IGND | -50 | mA | 8 | |||
| storage temperature | Tstg | -65 | 150 | ℃ | 8 | ||
| total power dissipation | Ptot | 500 | mW | 8 | |||
| soldering temperature | TL | 245 | ℃ | 10s, DIP | 8 | ||
| supply voltage | VCC | 2 | 5 | 6 | V | 8 | |
| input voltage | VI | 0 | V | 8 | |||
| output voltage | VO | 0 | V | 8 | |||
| input transition rise and fall rate | Δt/ΔV | 625 | ns/V | VCC=2.0V | 8 | ||
| input transition rise and fall rate | Δt/ΔV | 1.67 | 139 | ns/V | VCC=4.5V | 8 | |
| input transition rise and fall rate | Δt/ΔV | 83 | ns/V | VCC=6.0V | 8 | ||
| ambient temperature | Tamb | -40 | 125 | ℃ | 8 | ||
| HIGH-level input voltage | VIH | 1.5 | 1.2 | V | Tamb=25℃; VCC=2.0V | 9 | |
| HIGH-level input voltage | VIH | 3.15 | 2.4 | V | Tamb=25℃; VCC=4.5V | 9 | |
| HIGH-level input voltage | VIH | 4.2 | 3.2 | V | Tamb=25℃; VCC=6.0V | 9 | |
| LOW-level input voltage | VIL | 0.8 | 0.5 | V | Tamb=25℃; VCC=2.0V | 9 | |
| LOW-level input voltage | VIL | 2.1 | 1.35 | V | Tamb=25℃; VCC=4.5V | 9 | |
| LOW-level input voltage | VIL | 2.8 | 1.8 | V | Tamb=25℃; VCC=6.0V | 9 | |
| HIGH-level output voltage | VOH | 1.9 | 2 | V | Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V | 9 | |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V | 9 | |
| HIGH-level output voltage | VOH | 5.9 | 6 | V | Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V | 9 | |
| HIGH-level output voltage | VOH | 3.98 | 4.32 | V | Tamb=25℃; VI=VIH or VIL; IO=-4.0mA; VCC=4.5V | 9 | |
| HIGH-level output voltage | VOH | 5.48 | 5.81 | V | Tamb=25℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V | 9 | |
| LOW-level output voltage | VOL | 0 | 0.1 | V | Tamb=25℃; VI=VIH or VIL; IO=20uA; VCC=2.0V | 9 | |
| LOW-level output voltage | VOL | 0.15 | 0.26 | V | Tamb=25℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V | 9 | |
| LOW-level output voltage | VOL | 0.16 | 0.26 | V | Tamb=25℃; VI=VIH or VIL; IO=5.2mA; VCC=6.0V | 9 | |
| input leakage current | II | -1 | 1 | uA | Tamb=25℃; VI=VCC or GND; VCC=6.0V | 9 | |
| supply current | ICC | 2 | uA | Tamb=25℃; VI=VCC or GND; IO=0A; VCC=6.0V | 9 | ||
| propagation delay nA, nB, nC, nD to nY | tpd | 33 | 110 | ns | Tamb=25℃; see Figure 6; VCC=2.0V | 12 | |
| propagation delay nA, nB, nC, nD to nY | tpd | 12 | 22 | ns | Tamb=25℃; see Figure 6; VCC=4.5V | 12 | |
| propagation delay nA, nB, nC, nD to nY | tpd | 10 | 19 | ns | Tamb=25℃; see Figure 6; VCC=6.0V | 12 | |
| transition time | tt | 19 | 75 | ns | Tamb=25℃; see Figure 6; VCC=2.0V | 12 | |
| transition time | tt | 7 | 15 | ns | Tamb=25℃; see Figure 6; VCC=4.5V | 12 | |
| transition time | tt | 6 | 13 | ns | Tamb=25℃; see Figure 6; VCC=6.0V | 12 | |
| HIGH-level input voltage | VIH | 1.5 | V | Tamb=-40℃ to +125℃; VCC=2.0V | 11 | ||
| HIGH-level input voltage | VIH | 3.15 | V | Tamb=-40℃ to +125℃; VCC=4.5V | 11 | ||
| HIGH-level input voltage | VIH | 4.2 | V | Tamb=-40℃ to +125℃; VCC=6.0V | 11 | ||
| LOW-level input voltage | VIL | 0.5 | V | Tamb=-40℃ to +125℃; VCC=2.0V | 11 | ||
| LOW-level input voltage | VIL | 1.35 | V | Tamb=-40℃ to +125℃; VCC=4.5V | 11 | ||
| LOW-level input voltage | VIL | 1.8 | V | Tamb=-40℃ to +125℃; VCC=6.0V | 11 | ||
| HIGH-level output voltage | VOH | 1.9 | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V | 11 | ||
| HIGH-level output voltage | VOH | 4.4 | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V | 11 | ||
| HIGH-level output voltage | VOH | 5.9 | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V | 11 | ||
| HIGH-level output voltage | VOH | 3.7 | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-4.0mA; VCC=4.5V | 11 | ||
| HIGH-level output voltage | VOH | 5.2 | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V | 11 | ||
| LOW-level output voltage | VOL | 0.1 | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=20uA; VCC=2.0V | 11 | ||
| LOW-level output voltage | VOL | 0.4 | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V | 11 | ||
| input leakage current | II | -1 | 1 | uA | Tamb=-40℃ to +125℃; VI=VCC or GND; VCC=6.0V | 11 | |
| supply current | ICC | 40 | uA | Tamb=-40℃ to +125℃; VI=VCC or GND; IO=0A; VCC=6.0V | 11 | ||
| propagation delay nA, nB, nC, nD to nY | tpd | 33 | ns | Tamb=-40℃ to +125℃; see Figure 6; VCC=4.5V | 13 | ||
| propagation delay nA, nB, nC, nD to nY | tpd | 28 | ns | Tamb=-40℃ to +125℃; see Figure 6; VCC=6.0V | 13 |
CAD (KiCad official)
- Symbol:
SN74LS21N - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ls21n-etched.step/sn74ls21n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ls21n.step/sn74ls21n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: lingxingic datasheet (19 pp, sha256
b2d0e3a60be3a2e4, retrieved 2026-10-14, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74LS21N
**lingxingic** · Logic Gates · DIP-14
SN74LS21N from lingxingic, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input 1A of the first 4-input AND gate; a LOW level on any input forces 1Y LOW, and the input voltage range is 0 to VCC V. |
| 2 | 1B | input | Data input 1B of the first 4-input AND gate; a LOW level on this input forces 1Y LOW, and the input voltage range is 0 to VCC V. |
| 3 | n.c. | unconnected | Not connected. |
| 4 | 1C | input | Data input 1C of the first 4-input AND gate; a LOW level on this input forces 1Y LOW, and the input voltage range is 0 to VCC V. |
| 5 | 1D | input | Data input 1D of the first 4-input AND gate; a LOW level on this input forces 1Y LOW, and the input voltage range is 0 to VCC V. |
| 6 | 1Y | output | Data output 1Y of the first AND gate, HIGH only when inputs 1A, 1B, 1C and 1D are all HIGH; the output voltage range is 0 to VCC V. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 8 | 2Y | output | Data output 2Y of the second AND gate, HIGH only when inputs 2A, 2B, 2C and 2D are all HIGH; the output voltage range is 0 to VCC V. |
| 9 | 2A | input | Data input 2A of the second 4-input AND gate; a LOW level on this input forces 2Y LOW, and the input voltage range is 0 to VCC V. |
| 10 | 2B | input | Data input 2B of the second 4-input AND gate; a LOW level on this input forces 2Y LOW, and the input voltage range is 0 to VCC V. |
| 11 | n.c. | unconnected | Not connected. |
| 12 | 2C | input | Data input 2C of the second 4-input AND gate; a LOW level on this input forces 2Y LOW, and the input voltage range is 0 to VCC V. |
| 13 | 2D | input | Data input 2D of the second 4-input AND gate; a LOW level on this input forces 2Y LOW, and the input voltage range is 0 to VCC V. |
| 14 | VCC | power_in | Supply voltage; the recommended range is 2.0 V to 6.0 V (typ. 5.0 V), and the absolute maximum is -0.5 V to +7 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | DIP-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | | 7 | V | | 8 |
| input clamping current | IIK | -20 | | 20 | mA | VI<-0.5V or VI>VCC+0.5V | 8 |
| output clamping current | IOK | -20 | | 20 | mA | VO<-0.5V or VO>VCC+0.5V | 8 |
| output current | IO | -25 | | 25 | mA | -0.5V<VO<VCC+0.5V | 8 |
| supply current | ICC | | | 50 | mA | | 8 |
| ground current | IGND | -50 | | | mA | | 8 |
| storage temperature | Tstg | -65 | | 150 | ℃ | | 8 |
| total power dissipation | Ptot | | | 500 | mW | | 8 |
| soldering temperature | TL | | | 245 | ℃ | 10s, DIP | 8 |
| supply voltage | VCC | 2 | 5 | 6 | V | | 8 |
| input voltage | VI | 0 | | | V | | 8 |
| output voltage | VO | 0 | | | V | | 8 |
| input transition rise and fall rate | Δt/ΔV | | | 625 | ns/V | VCC=2.0V | 8 |
| input transition rise and fall rate | Δt/ΔV | | 1.67 | 139 | ns/V | VCC=4.5V | 8 |
| input transition rise and fall rate | Δt/ΔV | | | 83 | ns/V | VCC=6.0V | 8 |
| ambient temperature | Tamb | -40 | | 125 | ℃ | | 8 |
| HIGH-level input voltage | VIH | 1.5 | 1.2 | | V | Tamb=25℃; VCC=2.0V | 9 |
| HIGH-level input voltage | VIH | 3.15 | 2.4 | | V | Tamb=25℃; VCC=4.5V | 9 |
| HIGH-level input voltage | VIH | 4.2 | 3.2 | | V | Tamb=25℃; VCC=6.0V | 9 |
| LOW-level input voltage | VIL | | 0.8 | 0.5 | V | Tamb=25℃; VCC=2.0V | 9 |
| LOW-level input voltage | VIL | | 2.1 | 1.35 | V | Tamb=25℃; VCC=4.5V | 9 |
| LOW-level input voltage | VIL | | 2.8 | 1.8 | V | Tamb=25℃; VCC=6.0V | 9 |
| HIGH-level output voltage | VOH | 1.9 | 2 | | V | Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V | 9 |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | | V | Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V | 9 |
| HIGH-level output voltage | VOH | 5.9 | 6 | | V | Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V | 9 |
| HIGH-level output voltage | VOH | 3.98 | 4.32 | | V | Tamb=25℃; VI=VIH or VIL; IO=-4.0mA; VCC=4.5V | 9 |
| HIGH-level output voltage | VOH | 5.48 | 5.81 | | V | Tamb=25℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V | 9 |
| LOW-level output voltage | VOL | | 0 | 0.1 | V | Tamb=25℃; VI=VIH or VIL; IO=20uA; VCC=2.0V | 9 |
| LOW-level output voltage | VOL | | 0.15 | 0.26 | V | Tamb=25℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V | 9 |
| LOW-level output voltage | VOL | | 0.16 | 0.26 | V | Tamb=25℃; VI=VIH or VIL; IO=5.2mA; VCC=6.0V | 9 |
| input leakage current | II | -1 | | 1 | uA | Tamb=25℃; VI=VCC or GND; VCC=6.0V | 9 |
| supply current | ICC | | | 2 | uA | Tamb=25℃; VI=VCC or GND; IO=0A; VCC=6.0V | 9 |
| propagation delay nA, nB, nC, nD to nY | tpd | | 33 | 110 | ns | Tamb=25℃; see Figure 6; VCC=2.0V | 12 |
| propagation delay nA, nB, nC, nD to nY | tpd | | 12 | 22 | ns | Tamb=25℃; see Figure 6; VCC=4.5V | 12 |
| propagation delay nA, nB, nC, nD to nY | tpd | | 10 | 19 | ns | Tamb=25℃; see Figure 6; VCC=6.0V | 12 |
| transition time | tt | | 19 | 75 | ns | Tamb=25℃; see Figure 6; VCC=2.0V | 12 |
| transition time | tt | | 7 | 15 | ns | Tamb=25℃; see Figure 6; VCC=4.5V | 12 |
| transition time | tt | | 6 | 13 | ns | Tamb=25℃; see Figure 6; VCC=6.0V | 12 |
| HIGH-level input voltage | VIH | 1.5 | | | V | Tamb=-40℃ to +125℃; VCC=2.0V | 11 |
| HIGH-level input voltage | VIH | 3.15 | | | V | Tamb=-40℃ to +125℃; VCC=4.5V | 11 |
| HIGH-level input voltage | VIH | 4.2 | | | V | Tamb=-40℃ to +125℃; VCC=6.0V | 11 |
| LOW-level input voltage | VIL | | | 0.5 | V | Tamb=-40℃ to +125℃; VCC=2.0V | 11 |
| LOW-level input voltage | VIL | | | 1.35 | V | Tamb=-40℃ to +125℃; VCC=4.5V | 11 |
| LOW-level input voltage | VIL | | | 1.8 | V | Tamb=-40℃ to +125℃; VCC=6.0V | 11 |
| HIGH-level output voltage | VOH | 1.9 | | | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V | 11 |
| HIGH-level output voltage | VOH | 4.4 | | | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V | 11 |
| HIGH-level output voltage | VOH | 5.9 | | | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V | 11 |
| HIGH-level output voltage | VOH | 3.7 | | | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-4.0mA; VCC=4.5V | 11 |
| HIGH-level output voltage | VOH | 5.2 | | | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V | 11 |
| LOW-level output voltage | VOL | | | 0.1 | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=20uA; VCC=2.0V | 11 |
| LOW-level output voltage | VOL | | | 0.4 | V | Tamb=-40℃ to +125℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V | 11 |
| input leakage current | II | -1 | | 1 | uA | Tamb=-40℃ to +125℃; VI=VCC or GND; VCC=6.0V | 11 |
| supply current | ICC | | | 40 | uA | Tamb=-40℃ to +125℃; VI=VCC or GND; IO=0A; VCC=6.0V | 11 |
| propagation delay nA, nB, nC, nD to nY | tpd | | | 33 | ns | Tamb=-40℃ to +125℃; see Figure 6; VCC=4.5V | 13 |
| propagation delay nA, nB, nC, nD to nY | tpd | | | 28 | ns | Tamb=-40℃ to +125℃; see Figure 6; VCC=6.0V | 13 |
## CAD (KiCad official)
- Symbol: `SN74LS21N`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files: `sn74ls21n-etched.step` / `sn74ls21n-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74ls21n.step` / `sn74ls21n.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [lingxingic datasheet](docs/sn74ls21n-datasheet.pdf) (19 pp, sha256 `b2d0e3a60be3a2e4`, retrieved 2026-10-14, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74ls21n-datasheet.pdf)