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SN74LS20N

Public Made by Adom

by adom

XBLW Logic Gates, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Datasheet

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Contents

README

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SN74LS20N

XBLW · Logic Gates · DIP-14

SN74LS20N from XBLW, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input 1A of gate 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input clamping current limited to ±20 mA.
2 1B input Data input 1B of gate 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input clamping current limited to ±20 mA.
3 n.c. unconnected Not connected.
4 1C input Data input 1C of gate 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input clamping current limited to ±20 mA.
5 1D input Data input 1D of gate 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input clamping current limited to ±20 mA.
6 1Y output Data output 1Y of gate 1, the NAND of inputs 1A to 1D (low when all inputs are high); output current is limited to ±25 mA.
7 GND power_in Ground (0 V) reference for all voltages in the datasheet.
8 2Y output Data output 2Y of gate 2, the NAND of inputs 2A to 2D (low when all inputs are high); output current is limited to ±25 mA.
9 2A input Data input 2A of gate 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input clamping current limited to ±20 mA.
10 2B input Data input 2B of gate 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input clamping current limited to ±20 mA.
11 n.c. unconnected Not connected.
12 2C input Data input 2C of gate 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input clamping current limited to ±20 mA.
13 2D input Data input 2D of gate 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input clamping current limited to ±20 mA.
14 VCC power_in Supply voltage: recommended 2.0 V to 6.0 V (absolute maximum 7 V with respect to GND).

Key specifications

Parameter Value
Manufacturer XBLW
Package DIP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 5
Input clamping current IIK -20 20 mA VI<-0.5V or VI>VCC+0.5V 5
Output clamping current IOK -20 20 mA VO<-0.5V or VO>VCC+0.5V 5
Output current IO -25 25 mA -0.5V<VO<VCC+0.5V 5
Supply current ICC 50 mA 5
Ground current IGND -50 mA 5
Total power dissipation Ptot 500 mW 5
Storage temperature Tstg -65 150 ℃ 5
Soldering temperature TL 260 ℃ 10s 5
Supply voltage VCC 2 5 6 V 5
Input voltage VI 0 V 5
Output voltage VO 0 V 5
Input transition rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 5
Input transition rise and fall rate Δt/ΔV 139 ns/V VCC=4.5V 5
Input transition rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 5
Ambient temperature Tamb -20 85 ℃ 5
HIGH-level input voltage VIH 3.15 V Tamb=25℃, VCC=4.5V 6
HIGH-level input voltage VIH 4.2 V Tamb=25℃, VCC=6.0V 6
HIGH-level output voltage VOH 1.9 V Tamb=25℃, VCC=2.0V, IO=-20uA 6
HIGH-level output voltage VOH 4.4 V Tamb=25℃, VCC=4.5V, IO=-20uA 6
HIGH-level output voltage VOH 3.98 V Tamb=25℃, VCC=4.5V, IO=-4.0mA 6
HIGH-level output voltage VOH 5.48 V Tamb=25℃, VCC=6.0V, IO=-5.2mA 6
LOW-level output voltage VOL 0.1 V Tamb=25℃, VCC=2.0V, IO=20uA 6
LOW-level output voltage VOL 0.26 V Tamb=25℃, VCC=4.5V, IO=4.0mA 6
Input leakage current II -1 1 uA Tamb=25℃, VI=VCC or GND, VCC=6.0V 6
Supply current ICC 2 uA Tamb=25℃, VI=VCC or GND, IO=0A, VCC=6.0V 6
Input capacitance CI 3.5 pF 6
HIGH-level output voltage VOH 3.84 V Tamb=-20℃ to +85℃, VCC=4.5V, IO=-4.0mA 6
HIGH-level output voltage VOH 5.34 V Tamb=-20℃ to +85℃, VCC=6.0V, IO=-5.2mA 6
LOW-level output voltage VOL 0.33 V Tamb=-20℃ to +85℃, VCC=4.5V, IO=4.0mA 6
Supply current ICC 20 uA Tamb=-20℃ to +85℃, VI=VCC or GND, IO=0A, VCC=6.0V 6

CAD (KiCad official)

  • Symbol: SN74LS20N
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ls20n-etched.step / sn74ls20n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls20n.step / sn74ls20n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XBLW datasheet (12 pp, sha256 11074007943c730e, retrieved 2026-10-14, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF