component
SN74LS192N
Public Made by Adomby adom
lingxingic Counters, Dividers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"version": "0.1.0",
"type": "component",
"description": "lingxingic Counters, Dividers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"logic",
"sn74ls192n",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
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"sn74ls192n.lbr",
"docs/hero.png",
"docs/sn74ls192n-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"sn74ls192n-hero.glb",
"sn74ls192n-hero.overlay.json",
"sn74ls192n-etched.glb"
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"component": {
"mpn": "SN74LS192N",
"manufacturer": "lingxingic",
"package": "DIP-16",
"pin_count": 16,
"category": "Logic",
"subcategory": "Counters, Dividers",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603393141659881472",
"parts": {
"symbol": "sn74ls192n.kicad_sym",
"footprint": "sn74ls192n.kicad_mod",
"model_3d": "sn74ls192n-hero.glb",
"model_3d_plain": "sn74ls192n-etched.glb",
"model_3d_step": "sn74ls192n-etched.step",
"model_3d_step_plain": "sn74ls192n.step",
"lbr": "sn74ls192n.lbr"
},
"distributor_links": {
"lcsc": "C22449628"
},
"distributor_check": {
"checked_at": "2026-10-15T11:06:53Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "D1",
"type": "input",
"description": "Parallel data input D1, loaded into flip-flop Q1 when PL is LOW."
},
{
"number": "2",
"name": "Q1",
"type": "output",
"description": "Flip-flop output 1 of the counter; it is forced LOW by a HIGH on MR."
},
{
"number": "3",
"name": "Q0",
"type": "output",
"description": "Flip-flop output 0 of the counter; it is forced LOW by a HIGH on MR."
},
{
"number": "4",
"name": "CPD",
"type": "input",
"description": "Count-down clock input, edge triggered on the LOW-to-HIGH transition; the counter counts down when CPU is held HIGH."
},
{
"number": "5",
"name": "CPU",
"type": "input",
"description": "Count-up clock input, edge triggered on the LOW-to-HIGH transition; the counter counts up when CPD is held HIGH."
},
{
"number": "6",
"name": "Q2",
"type": "output",
"description": "Flip-flop output 2 of the counter; it is forced LOW by a HIGH on MR."
},
{
"number": "7",
"name": "Q3",
"type": "output",
"description": "Flip-flop output 3 of the counter; it is forced LOW by a HIGH on MR."
},
{
"number": "8",
"name": "GND",
"type": "power_in",
"description": "Ground reference (0 V) for all voltages in the datasheet."
},
{
"number": "9",
"name": "D3",
"type": "input",
"description": "Parallel data input D3, loaded into flip-flop Q3 when PL is LOW."
},
{
"number": "10",
"name": "D2",
"type": "input",
"description": "Parallel data input D2, loaded into flip-flop Q2 when PL is LOW."
},
{
"number": "11",
"name": "PL",
"type": "input",
"description": "Asynchronous parallel load input, active LOW; it loads D0 to D3 into the counter regardless of the clock inputs."
},
{
"number": "12",
"name": "TCU",
"type": "output",
"description": "Terminal count up (carry) output, active LOW; it goes LOW at count 15 on the next HIGH-to-LOW transition of CPU."
},
{
"number": "13",
"name": "TCD",
"type": "output",
"description": "Terminal count down (borrow) output, active LOW; it goes LOW in the zero state when CPD goes LOW."
},
{
"number": "14",
"name": "MR",
"type": "input",
"description": "Asynchronous master reset input, active HIGH; it sets Q0 to Q3 LOW and overrides both clock inputs."
},
{
"number": "15",
"name": "D0",
"type": "input",
"description": "Parallel data input D0, loaded into flip-flop Q0 when PL is LOW."
},
{
"number": "16",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage; the recommended range is 2.0 V to 6.0 V, with 5.0 V typical."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet pin table (page 8) is plain text, but the pin configuration figure is not in the extra; The overbar on the active-LOW names (PL, TCU, TCD) is lost in text extraction, so names are shown wi; The datasheet lists the ordering information for SN74LS192N as DIP16 (page 4), which matches the req"
],
"pages_sent": 25,
"cost_usd": 0.0814,
"at": "2026-10-15T11:06:37"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603393141659881472",
"pages": 25,
"sha256": "2f9790fc62cae142",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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"footprint": "viewers/footprint.html"
},
"models_3d": [
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"role": "plain",
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"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "body on z = 0, through-hole leads below",
"extents_mm": [
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],
"zmin_mm": -3.3,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "17a30b1f0ab3fd5384a1231e3c63c394888d5b952c542a8c189e023ed3467464",
"checked": "2026-10-15",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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{
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}
}