# SN74LS191N

**Texas Instruments** · Counters, Dividers · PDIP-16

SN74LS191N from Texas Instruments, in a PDIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B | input | Parallel data input B, preset to the counter when LOAD is low. |
| 2 | QB | output | Counter output QB. |
| 3 | QA | output | Counter output QA. |
| 4 | CTEN | input | Active-low count enable input; a high level inhibits counting, and changes should be made only when the clock is high. |
| 5 | D/U | input | Down/up control input; low counts up and high counts down. |
| 6 | QC | output | Counter output QC. |
| 7 | QD | output | Counter output QD. |
| 8 | GND | power_in | Ground. |
| 9 | D | input | Parallel data input D, preset to the counter when LOAD is low. |
| 10 | C | input | Parallel data input C, preset to the counter when LOAD is low. |
| 11 | LOAD | input | Active-low asynchronous load input that presets the outputs to the data inputs independently of the clock. |
| 12 | MAX/MIN | output | Maximum/minimum count output that gives a high pulse about one clock cycle wide on overflow or underflow, for look-ahead cascading. |
| 13 | RCO | output | Active-low ripple clock output that pulses low for the low portion of the clock on overflow or underflow, for cascading. |
| 14 | CLK | input | Clock input; the counter advances on the low-to-high transition when enable is low. |
| 15 | A | input | Parallel data input A, preset to the counter when LOAD is low. |
| 16 | VCC | power_in | Positive supply voltage. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-16 |
| Category | Logic |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `SN74LS191N`
- Footprint: `Package_DIP:DIP-16_W7.62mm`
- 3D model: PDIP-16 (KiCad packages3D, STEP)
- 3D model files: `sn74ls191n-etched.step` / `sn74ls191n-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74ls191n.step` / `sn74ls191n.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74ls191) (28 pp, sha256 `0109f92d0857a924`, retrieved 2026-10-13, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74ls191n-datasheet.pdf)