main
Ray sn74ls165adr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… 6400b45
{
  "schema_version": 1,
  "type": "component",
  "slug": "sn74ls165adr",
  "title": "SN74LS165ADR",
  "brief": "Texas Instruments Shifting Register, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "sn74ls165adr"
  ],
  "component": {
    "mpn": "SN74LS165ADR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Shifting Register",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74ls165a.pdf",
    "parts": {
      "symbol": "sn74ls165adr.kicad_sym",
      "footprint": "sn74ls165adr.kicad_mod",
      "model_3d": "sn74ls165adr-etched.glb",
      "model_3d_plain": "sn74ls165adr.glb",
      "model_3d_step": "sn74ls165adr-etched.step",
      "model_3d_step_plain": "sn74ls165adr.step",
      "lbr": "sn74ls165adr.lbr"
    },
    "distributor_links": {
      "digikey": "296-31854-2-ND",
      "mouser": "595-SN74LS165ADR",
      "lcsc": "C7742"
    },
    "pins": [
      {
        "number": "1",
        "name": "SH/LD",
        "type": "input",
        "description": "Shift/Load control. Low = parallel-load data at A-H into the register (asynchronous, overrides clock). High = enable serial shifting on CLK/CLK INH. Diode-clamped TTL input, R_eq ~13 kΩ nom."
      },
      {
        "number": "2",
        "name": "CLK",
        "type": "input",
        "description": "Clock input. On the rising edge (with CLK INH low and SH/LD high), data shifts from QA toward QH. CLK and CLK INH are combined in a two-input positive-NOR gate, so either may serve as clock or inhibit."
      },
      {
        "number": "3",
        "name": "E",
        "type": "input",
        "description": "Parallel data input for bit E of the 8-bit word. Loaded into the corresponding stage when SH/LD is low. TTL input, R_eq ~24 kΩ nom."
      },
      {
        "number": "4",
        "name": "F",
        "type": "input",
        "description": "Parallel data input for bit F of the 8-bit word. Loaded into the corresponding stage when SH/LD is low."
      },
      {
        "number": "5",
        "name": "G",
        "type": "input",
        "description": "Parallel data input for bit G of the 8-bit word. Loaded into the corresponding stage when SH/LD is low."
      },
      {
        "number": "6",
        "name": "H",
        "type": "input",
        "description": "Parallel data input for bit H (last stage) of the 8-bit word. Loaded into the QH stage when SH/LD is low; also drives the QH/QH-bar outputs directly after load."
      },
      {
        "number": "7",
        "name": "QH_N",
        "type": "output",
        "description": "Complementary serial output (inverted QH). Provides the inverse of the eighth-stage register bit. Totem-pole TTL output, IOH = -800 μA, IOL = 16 mA, V_OL ≤ 0.4 V."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground / 0 V reference for the device."
      },
      {
        "number": "9",
        "name": "QH",
        "type": "output",
        "description": "Serial data output from the eighth register stage. During serial shift this bit is presented at QH; use as the serial-out for cascading multiple '165A devices. Totem-pole TTL output."
      },
      {
        "number": "10",
        "name": "SER",
        "type": "input",
        "description": "Serial data input. Data at SER is shifted into the QA stage on each rising clock edge when SH/LD is high and CLK INH is low. Used to cascade '165A devices (connect prior stage's QH to next stage's SER)."
      },
      {
        "number": "11",
        "name": "A",
        "type": "input",
        "description": "Parallel data input for bit A (first stage) of the 8-bit word. Loaded into QA when SH/LD is low."
      },
      {
        "number": "12",
        "name": "B",
        "type": "input",
        "description": "Parallel data input for bit B of the 8-bit word. Loaded when SH/LD is low."
      },
      {
        "number": "13",
        "name": "C",
        "type": "input",
        "description": "Parallel data input for bit C of the 8-bit word. Loaded when SH/LD is low."
      },
      {
        "number": "14",
        "name": "D",
        "type": "input",
        "description": "Parallel data input for bit D of the 8-bit word. Loaded when SH/LD is low."
      },
      {
        "number": "15",
        "name": "CLK INH",
        "type": "input",
        "description": "Clock inhibit. When high, blocks the CLK input (positive-NOR gating). Should be transitioned high only while CLK is high to avoid producing spurious clock edges."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply, 4.75 V to 5.25 V (SN74LS165A). Typical ICC ≈ 42 mA (max 63 mA); typical power dissipation 90 mW."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74ls165a.pdf",
        "pages": 25,
        "sha256": "1985012cf301bde1",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -4.445
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "74LS165",
      "logic_family": "74LS",
      "function_code": "165",
      "function_class": "ShiftRegister",
      "function_name": "8-Bit PISO Shift Register",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "sn74ls165adr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          9.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74ls165adr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          9.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "c8ffbc44d166ea3fae450abc197592e721047a5a9336847f534f839bd80d5dcd",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SOIC-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "sn74ls165adr"
  ],
  "discovery_pitch": "SN74LS165ADR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74ls165adr.kicad_sym",
    "sn74ls165adr.kicad_mod",
    "sn74ls165adr.glb",
    "sn74ls165adr.step",
    "sn74ls165adr-etched.step",
    "sn74ls165adr.lbr",
    "docs/hero.png",
    "docs/sn74ls165adr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "SN74LS165ADR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LS165AN",
      "kind": "unknown"
    },
    {
      "mpn": "SN74LS165ANSR",
      "kind": "unknown"
    },
    {
      "mpn": "SN74LS165ADRSN54LS165AJ",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LS165ADRSNJ54LS165AJ",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LS165ADRSNJ54LS165AW",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LS165ADRSNJ54LS165AFK",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T07:17:16.837Z"
}