component
SN74LS163ADR
Public Made by Adomby adom
Texas Instruments Counters, Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 19h ago |
| viewers | 19h ago |
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| page.json | 19h ago |
| README.md | 19h ago |
| sn74ls163adr-etched.glb | 19h ago |
| sn74ls163adr-etched.step | 19h ago |
| sn74ls163adr-hero.glb | 19h ago |
| sn74ls163adr-hero.overlay.json | 19h ago |
| sn74ls163adr.glb | 19h ago |
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| sn74ls163adr.lbr | 19h ago |
| sn74ls163adr.step | 19h ago |
SN74LS163ADR
Texas Instruments · Counters, Dividers · SOIC-16
SN74LS163ADR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLR | input | Active-low clear input; on the 'LS163A the clear is synchronous and sets all four flip-flop outputs low after the next clock pulse regardless of the enable inputs. |
| 2 | CLK | input | Clock input; the buffered clock triggers the four flip-flops on the rising edge of the clock waveform. |
| 3 | A | input | Data input A, loaded synchronously into the QA flip-flop when LOAD is low. |
| 4 | B | input | Data input B, loaded synchronously into the QB flip-flop when LOAD is low. |
| 5 | C | input | Data input C, loaded synchronously into the QC flip-flop when LOAD is low. |
| 6 | D | input | Data input D, loaded synchronously into the QD flip-flop when LOAD is low. |
| 7 | ENP | input | Count-enable input P; with ENT it enables counting when both are high. |
| 8 | GND | power_in | Ground. |
| 9 | LOAD | input | Active-low synchronous load input; a low level disables the counter and loads the data inputs on the next clock pulse regardless of the enable inputs. |
| 10 | ENT | input | Count-enable input T; it also gates the ripple carry output RCO. |
| 11 | QD | output | Counter output D (most significant bit). |
| 12 | QC | output | Counter output C. |
| 13 | QB | output | Counter output B. |
| 14 | QA | output | Counter output A (least significant bit). |
| 15 | RCO | output | Ripple carry output for n-bit cascading; counting spikes may occur on this output. |
| 16 | VCC | power_in | Supply voltage. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN74LS163ADR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
sn74ls163adr-etched.step/sn74ls163adr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ls163adr.step/sn74ls163adr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (40 pp, sha256
0ea50a72dfbd95c3, retrieved 2026-10-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).