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Contents

README

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SN74LS138N

Texas Instruments · Signal Switches, Multiplexers, Decoders · DIP-16

SN74LS138N from Texas Instruments, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Binary select input A, one of three address lines used with B and C to select which of the eight Y outputs is active.
2 B input Binary select input B, one of three address lines used with A and C to select which of the eight Y outputs is active.
3 C input Binary select input C, one of three address lines used with A and B to select which of the eight Y outputs is active.
4 G2A input Active-low enable input; must be low, along with G2B low and G1 high, for the decoder to be enabled (outputs low-active per selected address).
5 G2B input Active-low enable input; must be low, along with G2A low and G1 high, for the decoder to be enabled.
6 G1 input Active-high enable input; must be high, with G2A and G2B both low, for the decoder to be enabled.
7 Y7 output Decoder output 7, driven low only when the device is enabled and the select inputs (C,B,A) = (H,H,H); otherwise high.
8 GND power_in Ground reference supply pin.
9 Y6 output Decoder output 6, driven low only when the device is enabled and the select inputs (C,B,A) = (H,H,L); otherwise high.
10 Y5 output Decoder output 5, driven low only when the device is enabled and the select inputs (C,B,A) = (H,L,H); otherwise high.
11 Y4 output Decoder output 4, driven low only when the device is enabled and the select inputs (C,B,A) = (H,L,L); otherwise high.
12 Y3 output Decoder output 3, driven low only when the device is enabled and the select inputs (C,B,A) = (L,H,H); otherwise high.
13 Y2 output Decoder output 2, driven low only when the device is enabled and the select inputs (C,B,A) = (L,H,L); otherwise high.
14 Y1 output Decoder output 1, driven low only when the device is enabled and the select inputs (C,B,A) = (L,L,H); otherwise high.
15 Y0 output Decoder output 0, driven low only when the device is enabled and the select inputs (C,B,A) = (L,L,L); otherwise high.
16 VCC power_in Positive supply voltage pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package DIP-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: SN74LS138N
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74ls138n-etched.step / sn74ls138n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls138n.step / sn74ls138n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 f982e7f913e2ae15, retrieved 2026-09-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF