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SN74LS126N

Public Made by Adom

by adom

lingxingic Buffer/Driver/Transceiver, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LS126N

lingxingic · Buffer/Driver/Transceiver · DIP-14

SN74LS126N from lingxingic, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-high output enable for buffer 1; outputs 1Y is high-impedance when 1OE is low.
2 1A input Data input of buffer 1, with input voltage range 0 V to VCC.
3 1Y tri_state Three-state data output of buffer 1, high-impedance when 1OE is low.
4 2OE input Active-high output enable for buffer 2; output 2Y is high-impedance when 2OE is low.
5 2A input Data input of buffer 2, with input voltage range 0 V to VCC.
6 2Y tri_state Three-state data output of buffer 2, high-impedance when 2OE is low.
7 GND power_in Ground (0 V).
8 3Y tri_state Three-state data output of buffer 3, high-impedance when 3OE is low.
9 3A input Data input of buffer 3, with input voltage range 0 V to VCC.
10 3OE input Active-high output enable for buffer 3; output 3Y is high-impedance when 3OE is low.
11 4Y tri_state Three-state data output of buffer 4, high-impedance when 4OE is low.
12 4A input Data input of buffer 4, with input voltage range 0 V to VCC.
13 4OE input Active-high output enable for buffer 4; output 4Y is high-impedance when 4OE is low.
14 VCC power_in Supply voltage, recommended 2.0 V to 6.0 V (absolute maximum 7 V).

Key specifications

Parameter Value
Manufacturer lingxingic
Package DIP-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V Tamb=25℃ 7
Input clamping current IIK -20 20 mA VI<-0.5V or VI>VCC+0.5V 7
Output clamping current IOK -20 20 mA VO<-0.5V or VO>VCC+0.5V 7
Output current IO -35 35 mA -0.5V<VO<VCC+0.5V 7
Supply current ICC 70 mA 7
Ground current IGND -70 mA 7
Total power dissipation Ptot 500 mW 7
Storage temperature Tstg -65 150 ℃ 7
Soldering temperature TL 245 ℃ 10 s, DIP 7
Supply voltage VCC 2 5 6 V 7
Input voltage VI 0 V max = VCC 7
Output voltage VO 0 V max = VCC 7
Input rise and fall slew rate Δt/ΔV 625 ns/V VCC=2.0V 7
Input rise and fall slew rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 7
Input rise and fall slew rate Δt/ΔV 83 ns/V VCC=6.0V 7
Operating ambient temperature Tamb -40 125 ℃ 7
High-level input voltage VIH 1.5 V VCC=2.0V; Tamb=-40~+125℃ 10
High-level input voltage VIH 3.15 V VCC=4.5V; Tamb=-40~+125℃ 10
High-level input voltage VIH 4.2 V VCC=6.0V; Tamb=-40~+125℃ 10
Low-level input voltage VIL 0.5 V VCC=2.0V; Tamb=-40~+125℃ 10
Low-level input voltage VIL 1.35 V VCC=4.5V; Tamb=-40~+125℃ 10
Low-level input voltage VIL 1.8 V VCC=6.0V; Tamb=-40~+125℃ 10
High-level output voltage VOH 1.9 V VI=VIH or VIL; IO=-20uA; VCC=2.0V 10
High-level output voltage VOH 4.4 V VI=VIH or VIL; IO=-20uA; VCC=4.5V 10
High-level output voltage VOH 5.9 V VI=VIH or VIL; IO=-20uA; VCC=6.0V 10
High-level output voltage VOH 3.7 V VI=VIH or VIL; IO=-6.0mA; VCC=4.5V 10
High-level output voltage VOH 5.2 V VI=VIH or VIL; IO=-7.8mA; VCC=6.0V 10
Low-level output voltage VOL 0.1 V VI=VIH or VIL; IO=20uA; VCC=2.0V 10
Low-level output voltage VOL 0.4 V VI=VIH or VIL; IO=6.0mA; VCC=4.5V 10
Input leakage current II -1 1 uA VI=VCC or GND; VCC=6.0V 10
Off-state output current IOZ -10 10 uA VI=VIH or VIL; VO=VCC or GND; VCC=6.0V 10
Quiescent supply current ICC 160 uA VI=VCC or GND; IO=0A; VCC=6.0V 10
Propagation delay nA to nY tpd 150 ns VCC=2.0V; Tamb=-40~+125℃ 13
Propagation delay nA to nY tpd 30 ns VCC=4.5V; Tamb=-40~+125℃ 13
Propagation delay nA to nY tpd 26 ns VCC=6.0V; Tamb=-40~+125℃ 13
Enable time nOE to nY ten 190 ns VCC=2.0V; Tamb=-40~+125℃ 13
Enable time nOE to nY ten 38 ns VCC=4.5V; Tamb=-40~+125℃ 13
Enable time nOE to nY ten 32 ns VCC=6.0V; Tamb=-40~+125℃ 13
Disable time nOE to nY tdis 190 ns VCC=2.0V; Tamb=-40~+125℃ 13
Disable time nOE to nY tdis 38 ns VCC=4.5V; Tamb=-40~+125℃ 13
Disable time nOE to nY tdis 32 ns VCC=6.0V; Tamb=-40~+125℃ 13
Transition time tt 90 ns VCC=2.0V; Tamb=-40~+125℃ 13
Transition time tt 18 ns VCC=4.5V; Tamb=-40~+125℃ 13
Transition time tt 15 ns VCC=6.0V; Tamb=-40~+125℃ 13
Input capacitance CI 3.5 pF Tamb=25℃ 8
Power dissipation capacitance CPD 23 pF per package; VI=GND~VCC-1.5V; Tamb=25℃ 11

CAD (KiCad official)

  • Symbol: SN74LS126N
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ls126n-etched.step / sn74ls126n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls126n.step / sn74ls126n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (19 pp, sha256 d9607448f69fda2d, retrieved 2026-10-24, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF