component

SN74LS126DR

Public Made by Adom

by adom

lingxingic Buffers, Drivers, Receivers, Transceivers, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicsn74ls126drfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SN74LS126DR

lingxingic · Buffers, Drivers, Receivers, Transceivers · SOP-14

SN74LS126DR from lingxingic, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output enable input for buffer 1, active high (H enables, L forces 1Y to high impedance).
2 1A input Data input of buffer 1; recommended input voltage range is 0 V to VCC.
3 1Y output Data output of buffer 1, which goes to high impedance when 1OE is low; output clamp diodes are built in.
4 2OE input Output enable input for buffer 2, active high (H enables, L forces 2Y to high impedance).
5 2A input Data input of buffer 2; recommended input voltage range is 0 V to VCC.
6 2Y output Data output of buffer 2, which goes to high impedance when 2OE is low; output clamp diodes are built in.
7 GND power_in Ground reference, 0 V.
8 3Y output Data output of buffer 3, which goes to high impedance when 3OE is low; output clamp diodes are built in.
9 3A input Data input of buffer 3; recommended input voltage range is 0 V to VCC.
10 3OE input Output enable input for buffer 3, active high (H enables, L forces 3Y to high impedance).
11 4Y output Data output of buffer 4, which goes to high impedance when 4OE is low; output clamp diodes are built in.
12 4A input Data input of buffer 4; recommended input voltage range is 0 V to VCC.
13 4OE input Output enable input for buffer 4, active high (H enables, L forces 4Y to high impedance).
14 VCC power_in Supply voltage; recommended range 2.0 V to 6.0 V, absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
电源电压 VCC -0.5 7 V 7
输入钳位电流 IIK -20 20 mA VI<-0.5V 或 VI>VCC+0.5V 7
输出钳位电流 IOK -20 20 mA VO<-0.5V 或 VO>VCC+0.5V 7
输出电流 IO -35 35 mA -0.5V<VO<VCC+0.5V 7
电源电流 ICC 70 mA 7
地电流 IGND -70 mA 7
总功耗 Ptot 500 mW 7
贮存温度 Tstg -65 150 ℃ 7
焊接温度 TL 260 ℃ 10 s; SOP/TSSOP 7
电源电压 VCC 2 5 6 V 7
输入电压 VI 0 V 7
输出电压 VO 0 V 7
输入上升和下降转换速率 Δt/ΔV 625 ns/V VCC=2.0V 7
输入上升和下降转换速率 Δt/ΔV 1.67 139 ns/V VCC=4.5V 7
输入上升和下降转换速率 Δt/ΔV 83 ns/V VCC=6.0V 7
工作环境温度 Tamb -40 125 ℃ 7
高电平输入电压 VIH 1.5 V Tamb=-40~+125℃; VCC=2.0V 10
高电平输入电压 VIH 3.15 V Tamb=-40~+125℃; VCC=4.5V 10
高电平输入电压 VIH 4.2 V Tamb=-40~+125℃; VCC=6.0V 10
低电平输入电压 VIL 0.5 V Tamb=-40~+125℃; VCC=2.0V 10
低电平输入电压 VIL 1.35 V Tamb=-40~+125℃; VCC=4.5V 10
低电平输入电压 VIL 1.8 V Tamb=-40~+125℃; VCC=6.0V 10
高电平输出电压 VOH 1.9 V Tamb=-40~+125℃; VI=VIH或VIL; IO=-20uA; VCC=2.0V 10
高电平输出电压 VOH 4.4 V Tamb=-40~+125℃; VI=VIH或VIL; IO=-20uA; VCC=4.5V 10
高电平输出电压 VOH 5.9 V Tamb=-40~+125℃; VI=VIH或VIL; IO=-20uA; VCC=6.0V 10
高电平输出电压 VOH 3.7 V Tamb=-40~+125℃; VI=VIH或VIL; IO=-6.0mA; VCC=4.5V 10
高电平输出电压 VOH 5.2 V Tamb=-40~+125℃; VI=VIH或VIL; IO=-7.8mA; VCC=6.0V 10
低电平输出电压 VOL 0.1 V Tamb=-40~+125℃; VI=VIH或VIL; IO=20uA; VCC=2.0V 10
低电平输出电压 VOL 0.4 V Tamb=-40~+125℃; VI=VIH或VIL; IO=6.0mA; VCC=4.5V 10
输入漏电流 II -1 1 uA Tamb=-40~+125℃; VI=VCC或GND; VCC=6.0V 10
截止状态输出电流 IOZ -10 10 uA Tamb=-40~+125℃; VI=VIH或VIL; VO=VCC或GND; VCC=6.0V 10
静态电流 ICC 160 uA Tamb=-40~+125℃; VI=VCC或GND; IO=0A; VCC=6.0V 10
nA到nY的传输延时 tpd 150 ns Tamb=-40~+125℃; 见图5; VCC=2.0V 13
nA到nY的传输延时 tpd 30 ns Tamb=-40~+125℃; 见图5; VCC=4.5V 13
nA到nY的传输延时 tpd 26 ns Tamb=-40~+125℃; 见图5; VCC=6.0V 13
nOE到nY的使能时间 ten 190 ns Tamb=-40~+125℃; 见图6; VCC=2.0V 13
nOE到nY的使能时间 ten 38 ns Tamb=-40~+125℃; 见图6; VCC=4.5V 13
nOE到nY的使能时间 ten 32 ns Tamb=-40~+125℃; 见图6; VCC=6.0V 13
nOE到nY的失能时间 tdis 190 ns Tamb=-40~+125℃; 见图6; VCC=2.0V 13
nOE到nY的失能时间 tdis 38 ns Tamb=-40~+125℃; 见图6; VCC=4.5V 13
nOE到nY的失能时间 tdis 32 ns Tamb=-40~+125℃; 见图6; VCC=6.0V 13
转换时间 tt 90 ns Tamb=-40~+125℃; 见图5; VCC=2.0V 13
转换时间 tt 18 ns Tamb=-40~+125℃; 见图5; VCC=4.5V 13
转换时间 tt 15 ns Tamb=-40~+125℃; 见图5; VCC=6.0V 13

CAD (KiCad official)

  • Symbol: SN74LS126DR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ls126dr-etched.step / sn74ls126dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls126dr.step / sn74ls126dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (19 pp, sha256 d9607448f69fda2d, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF